SN74LVTH162245
- Members of the Texas Instruments Widebus™ Family
- A-Port Outputs Have Equivalent 22-
Series Resistors, So No External Resistors Are Required - Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
- Support Unregulated Battery Operation Down to 2.7 V
- Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
- Ioff and Power-Up 3-State Support Hot Insertion
- Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
- Distributed VCC and GND Pins Minimize High-Speed Switching Noise
- Flow-Through Architecture Optimizes PCB Layout
- Latch-Up Performance Exceeds 500 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
Widebus is a trademark of Texas Instruments.
The 'LVTH162245 devices are 16-bit (dual-octal) noninverting 3-state transceivers designed for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.
These devices can be used as two 8-bit transceivers or one 16-bit transceiver. The devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated.
The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
The A-port outputs, which are designed to source or sink up to 12 mA, include equivalent 22- series resistors to reduce overshoot and undershoot.
When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 |
|---|---|---|---|---|---|
| * | 데이터 시트 | 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS--SN74LVTH162245 datasheet (Rev. Q) | 2006. 11. 1 | ||
| 애플리케이션 노트 | An Overview of Bus-Hold Circuit and the Applications (Rev. B) | 2018. 9. 17 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| SSOP (DL) | 48 | Ultra Librarian |
| TSSOP (DGG) | 48 | Ultra Librarian |