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TXG8041-EP

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향상된 제품, 4비트, 고정 방향 3/1 접지 레벨 변환기

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데이터 시트

TXG8041-EP

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데이터 시트 지금 주문

제품 상세 정보

Rating HiRel Enhanced Product Ground offset voltage (max) (V) 80 Bits (#) 4 Topology Push-Pull Applications GPIO, I2S, PCM, SPI Forward/reverse channels 3 forward / 1 reverse Isolation rating Functional Data rate (max) (Mbps) 250 Prop delay (ns) 5.9 CMTI (V/µs) 250 Technology family TXG Vin (min) (V) 1.71 Vin (max) (V) 5.5 Output type 3-State Vout (min) (V) 1.71 Vout (max) (V) 5.5 Current consumption per channel (1 Mbps) (typ) (mA) 3.3 Features Partial power down (Ioff)
Rating HiRel Enhanced Product Ground offset voltage (max) (V) 80 Bits (#) 4 Topology Push-Pull Applications GPIO, I2S, PCM, SPI Forward/reverse channels 3 forward / 1 reverse Isolation rating Functional Data rate (max) (Mbps) 250 Prop delay (ns) 5.9 CMTI (V/µs) 250 Technology family TXG Vin (min) (V) 1.71 Vin (max) (V) 5.5 Output type 3-State Vout (min) (V) 1.71 Vout (max) (V) 5.5 Current consumption per channel (1 Mbps) (typ) (mA) 3.3 Features Partial power down (Ioff)
SOT-23-THN (DYY) 14 13.692 mm² 4.2 x 3.26
  • Supports DC shifts up to ±80V
  • AC Noise Rejection of 140VPP up to 1MHz
  • CMTI of 250V/µs
  • Low Prop Delay (<5ns) and Ch-Ch Skew (0.35ns)
  • Greater than 250Mbps
  • Low power consumption (0.65mA per channel at 1Mbps, 1.8V)
  • Fully configurable dual-rail design allows each port to operate from 1.71V to 5.5V
  • Supports VCC disconnect feature (I/Os are forced into high-Z)
  • Schmitt-trigger inputs allows for slow and noisy signals
  • Inputs with integrated static pull-down resistors prevent channels from floating
  • Operating temperature from –40°C to +125°C
  • Latch-up performance exceeds 100mA per JESD 78, class II
    • ESD protection exceeds JESD 22
    • 4000V human-body model
    • 500V charged-device model
  • Small SOT-24 (DYY-14) package
  • Supports DC shifts up to ±80V
  • AC Noise Rejection of 140VPP up to 1MHz
  • CMTI of 250V/µs
  • Low Prop Delay (<5ns) and Ch-Ch Skew (0.35ns)
  • Greater than 250Mbps
  • Low power consumption (0.65mA per channel at 1Mbps, 1.8V)
  • Fully configurable dual-rail design allows each port to operate from 1.71V to 5.5V
  • Supports VCC disconnect feature (I/Os are forced into high-Z)
  • Schmitt-trigger inputs allows for slow and noisy signals
  • Inputs with integrated static pull-down resistors prevent channels from floating
  • Operating temperature from –40°C to +125°C
  • Latch-up performance exceeds 100mA per JESD 78, class II
    • ESD protection exceeds JESD 22
    • 4000V human-body model
    • 500V charged-device model
  • Small SOT-24 (DYY-14) package

The TXG8041-EP is a 4-bit, fixed direction, non-galvanic based voltage and ground-level translator that can support both logic-level shifting between 1.71V to 5.5V and ground-level shifting up to ±80V. Compared to traditional level shifters, the TXG8041-EP can solve the challenges of voltage translation across different ground levels. The Simplified Diagram shows a common use case where DC shift occurs between GNDA to GNDB due to parasitic resistance or capacitance.

VCCA is referenced to GNDA and VCCB is referenced to GNDB. Ax pins are referenced to VCCA logic level while Bx pins are referenced to VCCB logic levels. Both A port and B port can accept voltages from 1.71V to 5.5V. This device includes two enable pins that can place the respective outputs in a high-impedance state when the OE pin is connected to GND or left floating. In the event of input power or signal loss, the output is default low when OE is High (refer to ). The leakage between GNDA and GNDB is 45nA when VCC to GND is shorted.

The TXG8041-EP helps improve noise immunity and power sequencing across different ground domains, while providing low power consumption, latency and channel-to-channel skew. TXG8041-EP can supress noise levels of 160VPP up to 1MHz (Figure 7-3). This device can support multiple interfaces such as SPI, UART, GPIO, and I2S.

The TXG8041-EP is a 4-bit, fixed direction, non-galvanic based voltage and ground-level translator that can support both logic-level shifting between 1.71V to 5.5V and ground-level shifting up to ±80V. Compared to traditional level shifters, the TXG8041-EP can solve the challenges of voltage translation across different ground levels. The Simplified Diagram shows a common use case where DC shift occurs between GNDA to GNDB due to parasitic resistance or capacitance.

VCCA is referenced to GNDA and VCCB is referenced to GNDB. Ax pins are referenced to VCCA logic level while Bx pins are referenced to VCCB logic levels. Both A port and B port can accept voltages from 1.71V to 5.5V. This device includes two enable pins that can place the respective outputs in a high-impedance state when the OE pin is connected to GND or left floating. In the event of input power or signal loss, the output is default low when OE is High (refer to ). The leakage between GNDA and GNDB is 45nA when VCC to GND is shorted.

The TXG8041-EP helps improve noise immunity and power sequencing across different ground domains, while providing low power consumption, latency and channel-to-channel skew. TXG8041-EP can supress noise levels of 160VPP up to 1MHz (Figure 7-3). This device can support multiple interfaces such as SPI, UART, GPIO, and I2S.
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* Data sheet TXG8041-EP Enhanced Product 4-bit, ±80V Ground-Level Translator datasheet PDF | HTML 2025/06/09

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TXG-4CH-EVM — 4채널 접지 레벨 변환기용 TXG 평가 모듈(EVM)

TXG-4CH-EVM은 TXGx04x 4채널 접지 레벨 변환기 제품군을 평가하는 데 사용되는 평가 모듈(EVM)입니다. 이 EVM은 16핀 DBQ, 14핀 DYY 및 14핀 RUC를 포함한 여러 패키지 옵션을 지원합니다. 이 EVM에는 장치를 평가할 수 있는 여러 테스트 포인트와 연결 옵션이 있습니다.
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