Product details

Technology family F Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 4 Inputs per channel 2 IOL (max) (mA) 1 IOH (max) (mA) -20 Input type Bipolar Output type Push-Pull Features Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 70 Rating Military Operating temperature range (°C) -55 to 125
Technology family F Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 4 Inputs per channel 2 IOL (max) (mA) 1 IOH (max) (mA) -20 Input type Bipolar Output type Push-Pull Features Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 70 Rating Military Operating temperature range (°C) -55 to 125
CDIP (J) 14 130.4652 mm² 19.56 x 6.67 CFP (W) 14 58.023 mm² 9.21 x 6.3 LCCC (FK) 20 79.0321 mm² 8.89 x 8.89
  • Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs
  • Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs

These devices contain four independent 2-input NAND gates. They perform the Boolean functions or Y = A\ + B\ in positive logic.

The SN54F00 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74F00 is characterized for operation from 0°C to 70°C.

 

 

These devices contain four independent 2-input NAND gates. They perform the Boolean functions or Y = A\ + B\ in positive logic.

The SN54F00 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74F00 is characterized for operation from 0°C to 70°C.

 

 

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Technical documentation

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Type Title Date
* Data sheet Quadruple 2-Input Positive-NAND Gates datasheet (Rev. A) 01 Oct 1993
* SMD SN54F00 SMD 5962-97577 21 Jun 2016
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 Aug 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996

Design & development

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CDIP (J) 14 View options
CFP (W) 14 View options
LCCC (FK) 20 View options

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