Home Microcontrollers (MCUs) & processors Microprocessors & DSPs Multimedia & industrial networking SoCs
Home
Microcontrollers (MCUs) & processors
Microprocessors & DSPs
Multimedia & industrial networking SoCs

TMS320C6670

ACTIVE

4 core fixed and floating point DSP for Communications and Telecom

Order now
Data sheet

TMS320C6670

ACTIVE
Data sheet Order now

Product details

CPU 32-/64-bit Frequency (MHz) 1000, 1200 PCIe 2 PCIe Gen2 Hardware accelerators FFT Coprocessor, TCP3d, TCP3e, VCP2 Operating system DSP/BIOS Rating Catalog Operating temperature range (°C) -40 to 100
CPU 32-/64-bit Frequency (MHz) 1000, 1200 PCIe 2 PCIe Gen2 Hardware accelerators FFT Coprocessor, TCP3d, TCP3e, VCP2 Operating system DSP/BIOS Rating Catalog Operating temperature range (°C) -40 to 100
FCBGA (CYP) 841 576 mm² (24 mm × 24 mm)
  • Four TMS320C66x DSP Core Subsystems at 1.00 GHz and 1.2GHz
    • 153.6 GMAC/76.8 GFLOP @ 1.2GHz
    • 32KB L1P, 32KB L1D, 1024KB L2 Per Core
    • 2MB Shared L2
  • Multicore Navigator and TeraNet Switch Fabric - 2 Tb
  • Network Coprocessors- Packet Accelerator, Security Accelerator
  • Four Lanes of SRIO 2.1 - 5 Gbaud Per Lane Full Duplex
  • Two Lanes PCIe Gen2 - 5 Gbaud Per Lane Full Duplex
  • HyperLink - 50Gbaud Operation, Full Duplex
  • Ethernet MAC Subsystem - Two SGMII Ports w/ 10/100/1000 Mbps operation
  • 64-Bit DDR3 Interface (DDR3-1600) - 8 GByte Addressable Memory Space
  • Six Lane SerDes-Based Antenna Interface (AIF2) - Operating at up to 6.144 Gbps
  • Hardware Coprocessors
    • -Enhanced Coprocessor for Turbo Encoding
      -Three Enhanced Coprocessors for Turbo Decoding
      -Four Viterbi Decoders
      -Three Fast Fourier Transform Coprocessors
      -Bit Rate CoProcessor
      -Two Receiver Accelerators for WCDMA
      -Transmitt Accelerator for WCDMA
  • Four Rake Search Accelerators for Chip Rate Processing and Reed-Muller Decoding
  • I2C Interface, 16 GPIO Pins, SPI Interface
  • Eight 64-Bit Timers, Three On-Chip PLLs
  • Four TMS320C66x DSP Core Subsystems at 1.00 GHz and 1.2GHz
    • 153.6 GMAC/76.8 GFLOP @ 1.2GHz
    • 32KB L1P, 32KB L1D, 1024KB L2 Per Core
    • 2MB Shared L2
  • Multicore Navigator and TeraNet Switch Fabric - 2 Tb
  • Network Coprocessors- Packet Accelerator, Security Accelerator
  • Four Lanes of SRIO 2.1 - 5 Gbaud Per Lane Full Duplex
  • Two Lanes PCIe Gen2 - 5 Gbaud Per Lane Full Duplex
  • HyperLink - 50Gbaud Operation, Full Duplex
  • Ethernet MAC Subsystem - Two SGMII Ports w/ 10/100/1000 Mbps operation
  • 64-Bit DDR3 Interface (DDR3-1600) - 8 GByte Addressable Memory Space
  • Six Lane SerDes-Based Antenna Interface (AIF2) - Operating at up to 6.144 Gbps
  • Hardware Coprocessors
    • -Enhanced Coprocessor for Turbo Encoding
      -Three Enhanced Coprocessors for Turbo Decoding
      -Four Viterbi Decoders
      -Three Fast Fourier Transform Coprocessors
      -Bit Rate CoProcessor
      -Two Receiver Accelerators for WCDMA
      -Transmitt Accelerator for WCDMA
  • Four Rake Search Accelerators for Chip Rate Processing and Reed-Muller Decoding
  • I2C Interface, 16 GPIO Pins, SPI Interface
  • Eight 64-Bit Timers, Three On-Chip PLLs

The TMS320C6670 Multicore Fixed and Floating Point System on Chip is a member of the C66xx SoC family based on TI's new KeyStone Multicore SoC Architecture designed specifically for high performance applications such as software defined radio, emerging broadband and other communications segments. Integrated with four C66x CorePac DSPs, each core runs at 1.0 to 1.20 GHz enabling up to 4.8 GHz. Hardware acceleration provides a highly integrated, power efficient and easy to use platform for implementing a combination of multi-band, multi-standard waveforms, including proprietary air-interfaces. The C6670 platform is power efficient and easy to use. The C66x CorePac DSP is fully backward compatible with all existing C6000 family of fixed and floating point DSPs.

The TMS320C6670 Multicore Fixed and Floating Point System on Chip is a member of the C66xx SoC family based on TI's new KeyStone Multicore SoC Architecture designed specifically for high performance applications such as software defined radio, emerging broadband and other communications segments. Integrated with four C66x CorePac DSPs, each core runs at 1.0 to 1.20 GHz enabling up to 4.8 GHz. Hardware acceleration provides a highly integrated, power efficient and easy to use platform for implementing a combination of multi-band, multi-standard waveforms, including proprietary air-interfaces. The C6670 platform is power efficient and easy to use. The C66x CorePac DSP is fully backward compatible with all existing C6000 family of fixed and floating point DSPs.

filter Find other Multimedia & industrial networking SoCs
Download View video with transcript Video
Support through a third party

This product does not have ongoing direct design support from TI. For support while working through your design, you may contact one of the following third parties: D3 Engineering, elnfochips, Ittiam Systems, Path Partner Technology, or Z3 Technologies.

Technical documentation

No results found. Please clear your search and try again.
View all 68
Top documentation Type Title Format options Date
* Data sheet TMS320C6670 Multicore Fixed and Floating-Point System-on-Chip datasheet (Rev. D) Mar 7, 2012
* Errata TMS320C6670 Multicore Fixed and Floating-Point SoC Errata (Revision 1.0, 2.0) (Rev. F) May 15, 2014
Application note DDR3 Design Requirements for KeyStone Devices (Rev. D) PDF | HTML Jul 7, 2022
Application note Keystone Error Detection and Correction EDC ECC (Rev. A) Jun 25, 2021
Application note How to Migrate CCS 3.x Projects to the Latest CCS (Rev. A) PDF | HTML May 19, 2021
User guide SYS/BIOS (TI-RTOS Kernel) User's Guide (Rev. V) Jun 1, 2020
Application note Keystone Bootloader Resources and FAQ May 29, 2019
Application note Keystone Multicore Device Family Schematic Checklist PDF | HTML May 17, 2019
Application note Hardware Design Guide for KeyStone Devices (Rev. D) PDF | HTML Mar 21, 2019
Application note Thermal Design Guide for DSP and Arm Application Processors (Rev. B) Aug 14, 2017
User guide Phase-Locked Loop (PLL) for KeyStone Devices User's Guide (Rev. I) Jul 26, 2017
Application note KeyStone I DDR3 Initialization (Rev. E) Oct 28, 2016
Application note Keystone NDK FAQ Oct 3, 2016
White paper A Diverse High Performance Platform for Advanced Driver Assistance System Sep 28, 2016
Application note SERDES Link Commissioning on KeyStone I and II Devices Apr 13, 2016
White paper Multicore SoCs stay a step ahead of SoC FPGAs Feb 23, 2016
User guide Enhanced Direct memory Access 3 (EDMA3) for KeyStone Devices User's Guide (Rev. B) PDF | HTML May 6, 2015
User guide Bit Rate Coprocessor (BCP) for KeyStone Devices User's Guide (Rev. A) Apr 27, 2015
User guide Multicore Navigator (CPPI) for KeyStone Architecture User's Guide (Rev. H) PDF | HTML Apr 9, 2015
User guide Antenna Interface 2 (AIF2) for KeyStone I Devices User's Guide (Rev. E) Feb 6, 2015
User guide DDR3 Memory Controller for KeyStone I Devices User's Guide (Rev. E) Jan 20, 2015
Application note TI Keystone DSP PCIe SerDes IBIS-AMI Models Oct 9, 2014
Application note TI Keystone DSP Hyperlink SerDes IBIS-AMI Models Oct 9, 2014
User guide Power Sleep Controller (PSC) for KeyStone Devices User's Guide (Rev. C) Sep 4, 2014
User guide Serial RapidIO (SRIO) for KeyStone Devices User's Guide (Rev. C) Sep 3, 2014
More literature KeyStone Lab Manual - Training Jun 5, 2014
User guide System Analyzer User's Guide (Rev. F) Nov 18, 2013
User guide PCI Express (PCIe) for KeyStone Devices User's Guide (Rev. D) Sep 30, 2013
User guide DSP Bootloader for KeyStone Architecture User's Guide (Rev. C) Jul 15, 2013
White paper Accelerating high-performance computing development with Desktop Linux SDK Jul 8, 2013
User guide Gigabit Ethernet Switch Subsystem for KeyStone Devices User's Guide (Rev. D) Jul 3, 2013
User guide Memory Protection Unit (MPU) for KeyStone Devices User's Guide (Rev. A) Jun 28, 2013
User guide C66x CorePac User's Guide (Rev. C) Jun 28, 2013
User guide HyperLink for KeyStone Devices User's Guide (Rev. C) May 28, 2013
User guide Security Accelerator (SA) for KeyStone Devices User's Guide (Rev. B) Feb 5, 2013
Application note SerDes Implementation Guidelines for KeyStone I Devices Oct 31, 2012
Application note Multicore Programming Guide (Rev. B) Aug 29, 2012
User guide TMS320C6000 Optimizing Compiler v 7.4 User's Guide (Rev. U) Aug 21, 2012
User guide TMS320C6000 Assembly Language Tools v 7.4 User's Guide (Rev. W) Aug 21, 2012
User guide Packet Accelerator (PA) for KeyStone Devices User's Guide (Rev. A) Jul 11, 2012
User guide Semaphore2 Hardware Module for KeyStone Devices User's Guide (Rev. A) Apr 24, 2012
User guide Serial Peripheral Interface (SPI) for KeyStone Devices User’s Guide (Rev. A) Mar 30, 2012
User guide Chip Interrupt Controller (CIC) for KeyStone Devices User's Guide (Rev. A) Mar 27, 2012
User guide 64-Bit Timer (Timer64) for KeyStone Devices User's Guide (Rev. A) Mar 22, 2012
White paper Maximizing Multicore Efficiency with Navigator Runtime Feb 23, 2012
User guide Fast Fourier Transform Coprocessor (FFTC) for KeyStone Devices User's Guide (Rev. C) Dec 20, 2011
Application note PCIe Use Cases for KeyStone Devices Dec 13, 2011
User guide Multicore Shared Memory Controller (MSMC) for KeyStone Devices User's Guide (Rev. A) Oct 15, 2011
Application note Introduction to TMS320C6000 DSP Optimization Oct 6, 2011
User guide Debug and Trace for KeyStone I Devices User's Guide (Rev. A) Sep 22, 2011
User guide Inter-Integrated Circuit (I2C) for KeyStone Devices User's Guide Sep 2, 2011
White paper KeyStone Multicore SoC Tool Suite: one platform for all needs Jun 17, 2011
User guide Viterbi-Decoder Coprocessor 2 (VCP2) for KeyStone Devices User's Guide (Rev. A) Jun 10, 2011
Product overview TMS320C6670 Breakthrough Performance for Process-Intensive Applications (Rev. B) Jun 9, 2011
Application note TMS320C66x DSP Generation of Devices (Rev. A) Apr 25, 2011
Application note Tuning VCP2 and TCP2 Bit Error Rate Performance Feb 11, 2011
White paper KeyStone Memory Architecture White Paper (Rev. A) Dec 21, 2010
User guide Turbo Decoder Coprocessor 3 (TCP3D) for KeyStone Devices User's Guide Nov 18, 2010
Application note Optimizing Loops on the C66x DSP Nov 9, 2010
User guide General-Purpose Input/Output (GPIO) forKeyStone Devices User's Guide Nov 9, 2010
Application note Migrating From AIF1 to AIF2 for KeyStone Devices Nov 9, 2010
User guide Turbo Encoder Coprocessor 3 (TCP3E) for KeyStone Devices User's Guide Nov 9, 2010
User guide C66x CPU and Instruction Set Reference Guide Nov 9, 2010
Application note Clocking Design Guide for KeyStone Devices Nov 9, 2010
User guide Universal Asynchronous Receiver/Transmitter (UART) for KeyStone Devices UG Nov 9, 2010
Application note Connecting AIF to FFTC Guide for KeyStone Devices Nov 9, 2010
User guide C66x DSP Cache User's Guide Nov 9, 2010
User guide Network Coprocessor for KeyStone Devices User's Guide Nov 2, 2010

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Daughter card

SHELD-3P-DSP-SOMS — Sheldon DSP-FPGA boards

Sheldon Instruments designs and manufactures DSP based, COTS data acquisition and control hardware for PCIe/PCI, PCI104e/PCI104, XMC/PMC, and CompactPCI systems, along with drivers and real time development software for a variety of applications and markets.

Learn more about Sheldon Instruments at (...)
From: Sheldon Instruments, Inc.
Supported products & hardware
Debug probe

TMDSEMU200-U — XDS200 USB Debug Probe

The XDS200 is a debug probe (emulator) used for debugging TI embedded devices. For the majority of devices it is recommended to use the newer, lower cost XDS110 (www.ti.com/tool/TMDSEMU110-U). The XDS200 supports a wide variety of standards (IEEE1149.1, IEEE1149.7, SWD) in a single pod. All XDS (...)

Supported products & hardware
In stock
Limit:
??asset.out-of-stock-ti_en_US??
Not available
Debug probe

TMDSEMU560V2STM-U — XDS560™ software v2 system trace USB debug probe

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).  Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

Supported products & hardware
In stock
Limit:
??asset.out-of-stock-ti_en_US??
Not available
Debug probe

TMDSEMU560V2STM-UE — XDS560v2 System Trace USB & Ethernet Debug Probe

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

Supported products & hardware
In stock
Limit:
??asset.out-of-stock-ti_en_US??
Not available
Debug probe

LB-3P-TRACE32-DSP — Lauterbach TRACE32 Debug and Trace System for Digital Signal Processors (DSPs)

Lauterbach‘s TRACE32® tools are a suite of leading-edge hardware and software components that enables developers to analyze, optimize and certify all kinds of single- or multi-core Digital Signal processors (DSPs) which are a popular choice for audio and video processing as well as radar data (...)

From: Lauterbach GmbH
Supported products & hardware
Interface adapter

HL5CABLE — Hyperlink Cable

A ½ meter long high speed cable to allow interfacing 2 EVMs via their high performance Hyperlink interfaces. EVMs supported are TMDSEVM6670L, TMDSEVM6678L, TMDSEVM6670LE, TMDSEVM6678LE, TMDSEVM6614LXE and TMDSEVM6618LXE.
Supported products & hardware
In stock
Limit:
??asset.out-of-stock-ti_en_US??
Not available
Interface adapter

TMDXEVMPCI — AMC to PCIe Adapter Card

This is a passive adapter card that allows select TI EVMs with a AMC header to be converted to a PCIe x4 lane edge connector so it can be inserted into a desktop PC or any where a PCIe header is utilized. The selected TI EVM must support native PCIe on the DSP. This card is a adapter and requires (...)
Supported products & hardware
In stock
Limit:
??asset.out-of-stock-ti_en_US??
Not available
Software development kit (SDK)

BIOSMCSDK-C66X — SYS/BIOS MCSDK for C66x

NOTE: K2x, C665x and C667x devices are now actively maintained on the Processor-SDK release stream. See links above.

Our Multicore Software Development Kits (MCSDK) provide highly-optimized bundles of foundational, platform-specific drivers to enable development on selected TI ARM and DSP devices. (...)

Supported products & hardware
Software development kit (SDK)

LINUXMCSDK — Linux MCSDK for C66x, C647x and C645x

NOTE: K2x, C665x and C667x devices are now actively maintained on the Processor-SDK release stream. See links above.

Our Multicore Software Development Kits (MCSDK) provide highly-optimized bundles of foundational, platform-specific drivers to enable development on selected TI ARM and DSP devices. (...)

Supported products & hardware
IDE, configuration, compiler or debugger

CCSTUDIO — CCStudio™ IDE

CCStudio™ IDE is part of TI's extensive CCStudio™ development ecosystem and is an integrated development environment for TI's microcontrollers, processors, wireless connectivity devices, and radar sensors. CCStudio IDE is available as desktop or cloud-based applications. The cloud version (...)

Supported products & hardware
Driver or library

FFTLIB — FFT Library for Floating Point Devices

The Texas Instruments FFT library is an optimized floating-point math function library for computing the discrete Fourier transform (DFT).

Supported products & hardware
Driver or library

MATHLIB — DSP Math Library for Floating Point Devices

The Texas Instruments math library is an optimized floating-point math function library for C programmers using TI floating point devices. These routines are typically used in computationally intensive real-time applications where optimal execution speed is critical. By using these routines instead (...)
Supported products & hardware
Driver or library

SPRC264 — TMS320C5000/6000 Image Library (IMGLIB)

C5000/6000 Image Processing Library (IMGLIB) is an optimized image/video processing function library for C programmers. It includes C-callable general-purpose image/video processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)

Supported products & hardware
Driver or library

SPRC265 — TMS320C6000 DSP Library (DSPLIB)

TMS320C6000 Digital Signal Processor Library (DSPLIB) is a platform-optimized DSP function library for C programmers. It includes C-callable, general-purpose signal-processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)

Supported products & hardware
Driver or library

TELECOMLIB — Telecom and Media Libraries - FAXLIB, VoLIB and AEC/AER for TMS320C64x+ and TMS320C55x Processors

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)

Supported products & hardware
Software codec

C66XCODECS — CODECS- Video, Speech - for C66x-based Devices

TI codecs are free, come with production licensing and are available for download now. All are production-tested for easy integration into video and voice applications. In many cases, the C64x+ codecs are provided and validated for C66x platforms. Datasheets and Release Notes are on the download (...)

Supported products & hardware
Simulation model

C6670 Power Consumption Model

SPRM546.ZIP (56 KB) - Power model
Supported products & hardware
Simulation model

KeyStone I SerDes IBIS AMI Models

SPRM742.ZIP (969314 KB) - IBIS model
lock = Requires export approval (1 minute)
Supported products & hardware
Simulation model

TMS320C6670 CYP BSDL Model (Silicon Revision 1.0) (Rev. A)

SPRM531A.ZIP (22 KB) - BSDL model
Supported products & hardware
Simulation model

TMS320C6670 CYP BSDL Model (Silicon Revision 2.0)

SPRM566.ZIP (22 KB) - BSDL model
Supported products & hardware
Simulation model

TMS320C6670 CYP IBIS Model (Rev. C)

SPRM533C.ZIP (2049 KB) - IBIS model
Supported products & hardware
Simulation model

TMS320C6670 Thermal Model

SPRR181.ZIP (3 KB) - Thermal model
Supported products & hardware
Reference design

TIDEP0011 — Power Solution for C667x DSP AVS Core (CVDD) with Dynamic Voltage Scaling

This reference design aims to supply the AVS core supply (CVDD) in the Keystone Multicore DSPs, mainly the C66x series. The C66x series uses SmartReflex technology to enable the DSP to control its supply voltage. In order to meet this requirement, this design combines a Synchronous Buck Converter (...)

Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
FCBGA (CYP) 841 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

Ordering & quality

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

TI E2E™ forums with technical support from TI engineers

View all forum topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos