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類比轉數位轉換器 (ADC)
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ADS127L18

現行

八通道、同步取樣、512-kSPS、寬頻 24 位 Δ-Σ ADC

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產品規格表

ADS127L18

現行
產品規格表 立即訂購

產品詳細資料

Resolution (Bits) 24 Sample rate (max) (ksps) 1365 Number of input channels 8 Interface type Parallel Architecture Delta-Sigma Input type Differential, Pseudo-Differential, Single-ended Multichannel configuration Simultaneous Sampling Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator, Wideband Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 24 Analog supply voltage (min) (V) 2.85 Analog supply voltage (max) (V) 5.5 SNR (dB) 110 Digital supply (min) (V) 1.65 Digital supply (max) (V) 1.95
Resolution (Bits) 24 Sample rate (max) (ksps) 1365 Number of input channels 8 Interface type Parallel Architecture Delta-Sigma Input type Differential, Pseudo-Differential, Single-ended Multichannel configuration Simultaneous Sampling Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator, Wideband Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 24 Analog supply voltage (min) (V) 2.85 Analog supply voltage (max) (V) 5.5 SNR (dB) 110 Digital supply (min) (V) 1.65 Digital supply (max) (V) 1.95
VQFN (RSH) 56 49 mm² (7 mm × 7 mm)
  • Simultaneously measure four or eight channels
  • Wideband filter mode: up to 512kSPS
  • Low-latency filter mode: up to 1365kSPS
  • Power-scalable speed modes:
    • Max speed: 512kSPS
      • 83mW (ADS127L14)
      • 165mW (ADS127L18)
    • High speed: 400kSPS
      • 64mW (ADS127L14)
      • 128mW (ADS127L18)
    • Mid speed: 200kSPS
      • 37mW (ADS127L14)
      • 74mW (ADS127L18)
    • Low speed: 50kSPS
      • 12mW (ADS127L14)
      • 24mW (ADS127L18)
  • AC performance with DC precision: (High-Speed Mode)
    • Dynamic range at 200kSPS: 112dB (typical)
    • THD: –118dB (typical)
    • INL: 1ppm of FSR (typical)
    • Offset drift: 10nV/°C (typical)
    • Gain drift: 0.5ppm/°C (typical)
  • Precharge buffered signal inputs
  • Programmable by pin setting or SPI
  • Frame-sync port for output data
  • Internal or external clock operation
  • Analog supply voltage: 2.85V to 5.5V
  • Simultaneously measure four or eight channels
  • Wideband filter mode: up to 512kSPS
  • Low-latency filter mode: up to 1365kSPS
  • Power-scalable speed modes:
    • Max speed: 512kSPS
      • 83mW (ADS127L14)
      • 165mW (ADS127L18)
    • High speed: 400kSPS
      • 64mW (ADS127L14)
      • 128mW (ADS127L18)
    • Mid speed: 200kSPS
      • 37mW (ADS127L14)
      • 74mW (ADS127L18)
    • Low speed: 50kSPS
      • 12mW (ADS127L14)
      • 24mW (ADS127L18)
  • AC performance with DC precision: (High-Speed Mode)
    • Dynamic range at 200kSPS: 112dB (typical)
    • THD: –118dB (typical)
    • INL: 1ppm of FSR (typical)
    • Offset drift: 10nV/°C (typical)
    • Gain drift: 0.5ppm/°C (typical)
  • Precharge buffered signal inputs
  • Programmable by pin setting or SPI
  • Frame-sync port for output data
  • Internal or external clock operation
  • Analog supply voltage: 2.85V to 5.5V

The ADS127L14 (quad) and ADS127L18 (octal) are 24-bit, delta-sigma (ΔΣ), analog-to-digital converters (ADCs) based on the single-channel ADS127L11. The devices provide simultaneous sampling of four or eight channels with data rates up to 512kSPS (wideband filter mode) and 1365kSPS (low-latency filter mode).

The ADS127L14 (quad) and ADS127L18 (octal) are 24-bit, delta-sigma (ΔΣ), analog-to-digital converters (ADCs) based on the single-channel ADS127L11. The devices provide simultaneous sampling of four or eight channels with data rates up to 512kSPS (wideband filter mode) and 1365kSPS (low-latency filter mode).
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針腳對針腳的功能與所比較的裝置相同。
ADS127L14 現行 四通道、同步取樣、512kSPS、寬頻 24 位 Δ-Σ ADC Lower channel count - 4-channels
功能相同，但針腳輸出與所比較的裝置不同。
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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 ADS127L1x 512kSPS, Quad and Octal, Simultaneous-Sampling, 24-Bit ADCs datasheet (Rev. B) PDF | HTML 2024/11/22
應用說明 A Simple, Java-Based CRC Calculator PDF | HTML 2026/3/4
應用說明 Design Considerations for Multiple Wide Bandwidth Delta- Sigma ADCs in Simultaneous-Sampling Systems (Rev. A) PDF | HTML 2025/12/29
應用說明 Achieve High SNR with the PGA855, Fully Differential Programmable-Gain Amplifier PDF | HTML 2024/3/21
設計指南 Four-Channel Synchronous IEPE Vibration Sensor Interface Reference Design PDF | HTML 2022/11/28
Application brief THP210 and ADS127L11 Performance PDF | HTML 2022/3/28

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

ADS127L18EVM-PDK — ADS127L18 評估模組

ADS127L18EVM 為評估 ADS127L18 性能的平台，而 ADS127L18 是八通道、24 位元同步取樣 ΔΣ 類比數位轉換器 (ADC)。評估套件包含 ADS127L18EVM 板和精密主機介面 (PHI) 控制器板，可讓隨附的電腦軟體透過 USB 與 ADC 通訊，以進行資料擷取、配置與分析。
使用指南: PDF | HTML
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支援軟體

ADS127L18-FPGA-EXAMPLE-CODE — ADS127L18 example FPGA code

Expedite your digital design using this example Verilog/RTL code for the ADS127L18 product family
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支援軟體

ADS127L18-MSPM0-EXAMPLE-CODE — ADS127L18 + MSPM0 example code

Expedite your design using this example C code for interfacing MSPM0 and the ADS127L18 product family.
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模擬型號

ADS117L14, ADS117L18, ADS127L14, ADS127L18 IBIS Model

SBAM524.ZIP (88 KB) - IBIS 模型
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模擬型號

ADS127L11 TINA-TI Reference Design

SBAM467 (3131 KB) - TINA-TI 參考設計
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計算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面，列出各種常見計算，從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。

除了作為獨立工具使用外，此計算機還與類比工程師口袋參考中描述的概念相得益彰。

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設計工具

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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VQFN (RSH) 56 Ultra Librarian
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