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數據轉換器
類比轉數位轉換器 (ADC)
精確 ADC

ADS127L14

現行

四通道、同步取樣、512kSPS、寬頻 24 位 Δ-Σ ADC

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產品規格表

ADS127L14

現行
產品規格表 立即訂購

產品詳細資料

Resolution (Bits) 24 Sample rate (max) (ksps) 1365 Number of input channels 4 Interface type SPI Architecture Delta-Sigma Input type Differential, Pseudo-Differential, Single-ended Multichannel configuration Simultaneous Sampling Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator, Wideband Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 11 Analog supply voltage (min) (V) 2.85 Analog supply voltage (max) (V) 5.5 SNR (dB) 110 Digital supply (min) (V) 1.65 Digital supply (max) (V) 1.95
Resolution (Bits) 24 Sample rate (max) (ksps) 1365 Number of input channels 4 Interface type SPI Architecture Delta-Sigma Input type Differential, Pseudo-Differential, Single-ended Multichannel configuration Simultaneous Sampling Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator, Wideband Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 11 Analog supply voltage (min) (V) 2.85 Analog supply voltage (max) (V) 5.5 SNR (dB) 110 Digital supply (min) (V) 1.65 Digital supply (max) (V) 1.95
VQFN (RSH) 56 49 mm² 7 x 7
  • Simultaneously measure four or eight channels
  • Wideband filter mode: up to 512kSPS
  • Low-latency filter mode: up to 1365kSPS
  • Power-scalable speed modes:
    • Max speed: 512kSPS
      • 83mW (ADS127L14)
      • 165mW (ADS127L18)
    • High speed: 400kSPS
      • 64mW (ADS127L14)
      • 128mW (ADS127L18)
    • Mid speed: 200kSPS
      • 37mW (ADS127L14)
      • 74mW (ADS127L18)
    • Low speed: 50kSPS
      • 12mW (ADS127L14)
      • 24mW (ADS127L18)
  • AC performance with DC precision: (High-Speed Mode)
    • Dynamic range at 200kSPS: 112dB (typical)
    • THD: –118dB (typical)
    • INL: 1ppm of FSR (typical)
    • Offset drift: 10nV/°C (typical)
    • Gain drift: 0.5ppm/°C (typical)
  • Precharge buffered signal inputs
  • Programmable by pin setting or SPI
  • Frame-sync port for output data
  • Internal or external clock operation
  • Analog supply voltage: 2.85V to 5.5V
  • Simultaneously measure four or eight channels
  • Wideband filter mode: up to 512kSPS
  • Low-latency filter mode: up to 1365kSPS
  • Power-scalable speed modes:
    • Max speed: 512kSPS
      • 83mW (ADS127L14)
      • 165mW (ADS127L18)
    • High speed: 400kSPS
      • 64mW (ADS127L14)
      • 128mW (ADS127L18)
    • Mid speed: 200kSPS
      • 37mW (ADS127L14)
      • 74mW (ADS127L18)
    • Low speed: 50kSPS
      • 12mW (ADS127L14)
      • 24mW (ADS127L18)
  • AC performance with DC precision: (High-Speed Mode)
    • Dynamic range at 200kSPS: 112dB (typical)
    • THD: –118dB (typical)
    • INL: 1ppm of FSR (typical)
    • Offset drift: 10nV/°C (typical)
    • Gain drift: 0.5ppm/°C (typical)
  • Precharge buffered signal inputs
  • Programmable by pin setting or SPI
  • Frame-sync port for output data
  • Internal or external clock operation
  • Analog supply voltage: 2.85V to 5.5V

The ADS127L14 (quad) and ADS127L18 (octal) are 24-bit, delta-sigma (ΔΣ), analog-to-digital converters (ADCs) based on the single-channel ADS127L11. The devices provide simultaneous sampling of four or eight channels with data rates up to 512kSPS (wideband filter mode) and 1365kSPS (low-latency filter mode).

The ADS127L14 (quad) and ADS127L18 (octal) are 24-bit, delta-sigma (ΔΣ), analog-to-digital converters (ADCs) based on the single-channel ADS127L11. The devices provide simultaneous sampling of four or eight channels with data rates up to 512kSPS (wideband filter mode) and 1365kSPS (low-latency filter mode).
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ADS127L18 現行 八通道、同步取樣、512-kSPS、寬頻 24 位 Δ-Σ ADC Higher channel count - 8-channels

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重要文件 類型 標題 格式選項 日期
* Data sheet ADS127L1x 512kSPS, Quad and Octal, Simultaneous-Sampling, 24-Bit ADCs datasheet (Rev. B) PDF | HTML 2024年 11月 22日
Application note Design Considerations for Multiple Wide Bandwidth Delta- Sigma ADCs in Simultaneous-Sampling Systems (Rev. A) PDF | HTML 2025年 12月 29日
Application note Achieve High SNR with the PGA855, Fully Differential Programmable-Gain Amplifier PDF | HTML 2024年 3月 21日
Design guide Four-Channel Synchronous IEPE Vibration Sensor Interface Reference Design PDF | HTML 2022年 11月 28日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

ADS127L18EVM-PDK — ADS127L18 評估模組

ADS127L18EVM 為評估 ADS127L18 性能的平台，而 ADS127L18 是八通道、24 位元同步取樣 ΔΣ 類比數位轉換器 (ADC)。評估套件包含 ADS127L18EVM 板和精密主機介面 (PHI) 控制器板，可讓隨附的電腦軟體透過 USB 與 ADC 通訊，以進行資料擷取、配置與分析。
使用指南: PDF | HTML
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支援軟體

ADS127L18-FPGA-EXAMPLE-CODE — ADS127L18 example FPGA code

Expedite your digital design using this example Verilog/RTL code for the ADS127L18 product family
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ADS127L18-MSPM0-EXAMPLE-CODE — ADS127L18 + MSPM0 example code

Expedite your design using this example C code for interfacing MSPM0 and the ADS127L18 product family.
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模擬型號

ADS117L14, ADS117L18, ADS127L14, ADS127L18 IBIS Model

SBAM524.ZIP (88 KB) - IBIS Model
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計算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一，涵蓋我們的類比和電源產品組合，以及特定類比行為模型，且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前，建立完整的終端設備設計和解決方案原型，進而縮短上市時間並降低開發成本。 

在 PSpice for TI 設計與模擬工具中，您可以搜尋 TI (...)
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TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
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VQFN (RSH) 56 Ultra Librarian
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