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類比轉數位轉換器 (ADC)
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ADS127L11

現行

具有易於驅動的輸入和寬頻或低延遲濾波器的 24 位元 400 kSPS Delta-Sigma ADC

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產品規格表

ADS127L11

現行
產品規格表 立即訂購

產品詳細資料

Resolution (Bits) 24 Sample rate (max) (ksps) 1000 Number of input channels 1 Interface type SPI Architecture Delta-Sigma Input type Differential, Pseudo-Differential, Single-ended Rating Catalog TI functional safety category Functional Safety-Capable Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator, Wideband Operating temperature range (°C) -40 to 125 Analog supply voltage (min) (V) 2.85 Analog supply voltage (max) (V) 5.5 SNR (dB) 110 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
Resolution (Bits) 24 Sample rate (max) (ksps) 1000 Number of input channels 1 Interface type SPI Architecture Delta-Sigma Input type Differential, Pseudo-Differential, Single-ended Rating Catalog TI functional safety category Functional Safety-Capable Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator, Wideband Operating temperature range (°C) -40 to 125 Analog supply voltage (min) (V) 2.85 Analog supply voltage (max) (V) 5.5 SNR (dB) 110 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
TSSOP (PW) 20 41.6 mm² 6.5 x 6.4 WQFN (RUK) 20 9 mm² 3 x 3
  • Programmable data rate:
    • Up to 400 kSPS (wideband filter)
    • Up to 1.067 MSPS (low-latency filter)
  • Selectable digital filter:
    • Wideband or low-latency
  • AC accuracy with dc precision:
    • Dynamic range: 111.5 dB (200 kSPS)
    • THD: –120 dB
    • INL: 0.9 ppm of FS
    • Offset drift: 50 nV/°C
    • Gain drift: 0.6 ppm/°C
  • Power-scalable architecture:
    • High-speed mode: 400 kSPS, 18.6 mW
    • Low-speed mode: 50 kSPS, 3.3 mW
  • Input and reference precharge buffers
  • Internal or external clock
  • Functional Safety-Capable
  • Programmable data rate:
    • Up to 400 kSPS (wideband filter)
    • Up to 1.067 MSPS (low-latency filter)
  • Selectable digital filter:
    • Wideband or low-latency
  • AC accuracy with dc precision:
    • Dynamic range: 111.5 dB (200 kSPS)
    • THD: –120 dB
    • INL: 0.9 ppm of FS
    • Offset drift: 50 nV/°C
    • Gain drift: 0.6 ppm/°C
  • Power-scalable architecture:
    • High-speed mode: 400 kSPS, 18.6 mW
    • Low-speed mode: 50 kSPS, 3.3 mW
  • Input and reference precharge buffers
  • Internal or external clock
  • Functional Safety-Capable

The ADS127L11 is a 24-bit, delta-sigma (ΔΣ), analog-to-digital converter (ADC) with data rates up to 400 kSPS using the wideband filter and up to 1067 kSPS using the low-latency filter. The device offers an excellent combination of ac performance and dc precision with low power consumption (18.6 mW in high-speed mode).

The device integrates input and reference buffers to reduce signal loading. The low-drift modulator achieves excellent dc precision with low in-band noise for outstanding ac performance. The power-scalable architecture provides two speed modes to optimize data rate, resolution, and power consumption.

The digital filter is configurable for wideband or low-latency operation, allowing wideband ac performance or data throughput for dc signals to be optimized, all in one device.

The serial interface features daisy-chain capability to reduce the SPI I/O over an isolation barrier. Input and output data and register settings are validated by a cyclic-redundancy check (CRC) feature to enhance operational reliability.

The small 3-mm × 3-mm WQFN and 6.5-mm × 4.4-mm TSSOP packages are designed for limited space applications. The device is fully specified for operation over the –40°C to +125°C temperature range.

The ADS127L11 is a 24-bit, delta-sigma (ΔΣ), analog-to-digital converter (ADC) with data rates up to 400 kSPS using the wideband filter and up to 1067 kSPS using the low-latency filter. The device offers an excellent combination of ac performance and dc precision with low power consumption (18.6 mW in high-speed mode).

The device integrates input and reference buffers to reduce signal loading. The low-drift modulator achieves excellent dc precision with low in-band noise for outstanding ac performance. The power-scalable architecture provides two speed modes to optimize data rate, resolution, and power consumption.

The digital filter is configurable for wideband or low-latency operation, allowing wideband ac performance or data throughput for dc signals to be optimized, all in one device.

The serial interface features daisy-chain capability to reduce the SPI I/O over an isolation barrier. Input and output data and register settings are validated by a cyclic-redundancy check (CRC) feature to enhance operational reliability.

The small 3-mm × 3-mm WQFN and 6.5-mm × 4.4-mm TSSOP packages are designed for limited space applications. The device is fully specified for operation over the –40°C to +125°C temperature range.
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重要文件 類型 標題 格式選項 日期
* Data sheet ADS127L11 400-kSPS, Wide-Bandwidth, 24-Bit, Delta-Sigma ADC datasheet (Rev. C) PDF | HTML 2022年 9月 6日
Application note Design Considerations for Multiple Wide Bandwidth Delta- Sigma ADCs in Simultaneous-Sampling Systems (Rev. A) PDF | HTML 2025年 12月 29日
Product overview High Speed Amplifiers for In-Vitro Diagnostics (IVD) Analog Front End PDF | HTML 2025年 4月 10日
Functional safety information ADS1x7Lx1x Functional Safety FIT Rate, FMD and Pin FMA (Rev. C) PDF | HTML 2024年 9月 26日
Application note Achieve High SNR with the PGA855, Fully Differential Programmable-Gain Amplifier PDF | HTML 2024年 3月 21日
Application note Four Channel Analog to Digital Interface with Sitara AM243x MCU+ PDF | HTML 2023年 4月 20日
Application note Digital Filter Types in Delta-Sigma ADCs (Rev. A) PDF | HTML 2023年 3月 29日
Design guide Four-Channel Synchronous IEPE Vibration Sensor Interface Reference Design PDF | HTML 2022年 11月 28日
Product overview PLC Analog Input Front-End Architectures PDF | HTML 2022年 7月 31日
Application brief THP210 and ADS127L11 Performance 2022年 3月 28日
Technical article Balancing ADC size, power, resolution and bandwidth in precision data-acquisition PDF | HTML 2021年 12月 3日

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如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

ADS127L11EVM-PDK — ADS127L11 評估模組，適用於具有易於驅動的輸入和寬頻或低延遲濾波器的 ADC

ADS127L11 評估模組 (EVM) 性能展示套件 (PDK)，這是一款用於評估 ADS127L11 的平台，是 24 位元、高速寬頻 delta-sigma (ΔΣ) 類比轉數位轉換器 (ADC) 的平台。

PDK 內含 ADS127L11 評估板、精密主機介面 (PHI) 控制器電路板，以及隨附的電腦軟體，可讓使用者透過通用序列匯流排 (USB) 與 ADC 通訊、擷取資料，以及執行資料分析。

使用指南: PDF | HTML
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ADS127L11-C-EXAMPLE-CODE — ADS127L11 C Example Code

Expedite your embedded design using this example C code for the ADS127L11
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模擬型號

ADS127L11 IBIS Model

SBAM459.ZIP (105 KB) - IBIS Model
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模擬型號

ADS127L11 TINA-TI Reference Design

SBAM467.TSC (3131 KB) - TINA-TI Reference Design
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計算工具

ADC-DESIGN-CALC — Online design calculator tool for TI Precision ADCs

ADC-DESIGN-CALC is an online resource with multiple ADC calculator tools (such as Digital Filter Response, Code-to-Voltage, CMR, CRC, etc.) for TI Precision ADCs.
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ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

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計算工具

SBAR019 — ADS127L11 Design Calculator

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設計工具

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一，涵蓋我們的類比和電源產品組合，以及特定類比行為模型，且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前，建立完整的終端設備設計和解決方案原型，進而縮短上市時間並降低開發成本。 

在 PSpice for TI 設計與模擬工具中，您可以搜尋 TI (...)
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模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
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參考設計

TIDA-010249 — 四通道同步震動感測器介面參考設計

此參考設計闡明同步四通道寬頻高解析度介面的原理、設計與測試。主要目標為震動感測應用，但此設計也可套用至任何需要寬頻的應用項目，例如功率因數量測中三相電壓及電流監控。
Design guide: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
TSSOP (PW) 20 Ultra Librarian
WQFN (RUK) 20 Ultra Librarian
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