AM26LS32AC
- AM26LS32A Devices meet or exceed the requirements of ANSI TIA/EIA-422-B, TIA/EIA-423-B, and ITU recommendations V.10 and V.11
- AM26LS32A Devices have ±7-V Common-mode range with ±200-mV sensitivity
- AM26LS33A Devices have ±15-V common-mode range with ±500-mV sensitivity
- Input hysteresis 50 mV typical
- Operate from a single 5-V supply
- Low-power Schottky circuitry
- 3-State outputs
- Complementary output-enable inputs
- Input impedance 12 kΩ minimum
- Open input fail-safe
The AM26LS32Ax and AM26LS33Ax devices are quadruple differential line receivers for balanced and unbalanced digital data transmission. The enable function is common to all four receivers and offers a choice of active-high or active-low input. The 3-state outputs permit connection directly to a bus-organized system. When the inputs are open, the fail-safe design makes sure the outputs always are high.
Compared to the AM26LS32 and the AM26LS33, the AM26LS32A and AM26LS33A incorporate an additional stage of amplification to improve sensitivity. The input impedance has been increased, resulting in less loading of the bus line. The additional stage has increased propagation delay; however, this does not affect interchangeability in most applications.
The AM26LS32AC and AM26LS33AC are characterized for operation from 0°C to 70°C. The AM26LS32AI is characterized for operation from –40°C to 85°C. The AM26LS32AM and AM26LS33AM are characterized for operation over the full military temperature range of –55°C to 125°C.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | AM26LS32Ax, AM26LS33Ax Quadruple Differential Line Receivers datasheet (Rev. G) | PDF | HTML | 2023/8/9 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| TSSOP (PW) | 16 | Ultra Librarian |
| SOP (NS) | 16 | Ultra Librarian |
| SOIC (D) | 16 | Ultra Librarian |
| PDIP (N) | 16 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。