產品詳細資料

Rating Catalog Operating temperature range (°C) to
Rating Catalog Operating temperature range (°C) to
HTQFP (PHP) 48 81 mm² (9 mm × 9 mm)
  • INL: 1.9ppm (±0.5LSB at 18 bits)
  • DNL: 1.9ppm (±0.5LSB at 18 bits)
  • VREF range: ±21V
  • Integrated ±21V output buffer with high slew rate
  • Digitally controlled gain options: 1 ×, 2 ×, and 4 ×
  • 50ns settling to 0.1%FSR with 140pVs glitch
  • Reference multiplying bandwidth: 25MHz, MFE −90dB at 100kHz
  • THD at ±5V output: −125dB (2kHz) and −110dB (100kHz)
  • QSPI™-compatible interface: 33MUPS in 16-bit high-speed mode at 66MHz DDR
  • Double-buffered registers with per-channel LDAC pins
  • Internal power on reset
  • Separate 4Q multiplying, Kelvin-connected reference inputs
  • Integrated ground buffer
  • INL: 1.9ppm (±0.5LSB at 18 bits)
  • DNL: 1.9ppm (±0.5LSB at 18 bits)
  • VREF range: ±21V
  • Integrated ±21V output buffer with high slew rate
  • Digitally controlled gain options: 1 ×, 2 ×, and 4 ×
  • 50ns settling to 0.1%FSR with 140pVs glitch
  • Reference multiplying bandwidth: 25MHz, MFE −90dB at 100kHz
  • THD at ±5V output: −125dB (2kHz) and −110dB (100kHz)
  • QSPI™-compatible interface: 33MUPS in 16-bit high-speed mode at 66MHz DDR
  • Double-buffered registers with per-channel LDAC pins
  • Internal power on reset
  • Separate 4Q multiplying, Kelvin-connected reference inputs
  • Integrated ground buffer

The DAC90802 is a dual‐channel 18-bit, multiplying digital-to-analog converter (MDAC) capable of ±23.5V supply span operation. This device supports a dynamic signal range of ±21V for the reference inputs, and voltage feedback at the RFB pin, where gain options of 1 ×, 2 ×, and 4 × are digitally selectable. The output pins, VOUT support the full output range from VREFP to VREFN.

The DAC90802 provides a low-noise voltage output, and true Kelvin-connection accesses to the integrated configuration resistors of the MDAC. This device maintains very-low thermal variation and excellent long-term drift performance in the core R-2R ladder. The DAC90802 implements selectable optimizations for use in arbitrary waveform generation (AWG) mode, fast-settling mode, or multiplying mode.

A 66MHz serial data interface with up to four serial data lines (SDIO0 through SDIO3) in dual data rate (DDR) mode, supports update rates up to 33MUPS in high-speed 16-bit mode, and 22MUPS in high resolution 18-bit mode. The per-channel edge-sensitive load-DAC LDAC inputs allow fine skew control of the DAC. The DAC90802 supports device reset using the RESET pin.

The DAC90802 is a dual‐channel 18-bit, multiplying digital-to-analog converter (MDAC) capable of ±23.5V supply span operation. This device supports a dynamic signal range of ±21V for the reference inputs, and voltage feedback at the RFB pin, where gain options of 1 ×, 2 ×, and 4 × are digitally selectable. The output pins, VOUT support the full output range from VREFP to VREFN.

The DAC90802 provides a low-noise voltage output, and true Kelvin-connection accesses to the integrated configuration resistors of the MDAC. This device maintains very-low thermal variation and excellent long-term drift performance in the core R-2R ladder. The DAC90802 implements selectable optimizations for use in arbitrary waveform generation (AWG) mode, fast-settling mode, or multiplying mode.

A 66MHz serial data interface with up to four serial data lines (SDIO0 through SDIO3) in dual data rate (DDR) mode, supports update rates up to 33MUPS in high-speed 16-bit mode, and 22MUPS in high resolution 18-bit mode. The per-channel edge-sensitive load-DAC LDAC inputs allow fine skew control of the DAC. The DAC90802 supports device reset using the RESET pin.

下載 觀看有字幕稿的影片 影片

技術文件

找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 1
重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 DAC90802 , Dual 18 -Bit, Voltage Output Multiplying DAC datasheet PDF | HTML 2026/9/25

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

DAC90802EVM-PDK — DAC90802 評估模組

DAC90802 評估板配備兩個可編程輸出通道,並透過 EVM 圖形使用者介面 (GUI) 控制。通道 0 展示一般應用,包括線性測試、任意波形產生 (AWG),以及標準 DC 電壓輸出。通道 1 專門配置用於頻寬倍增應用。DAC90802EVM 電路板透過連接至個人電腦 (PC) 的 USB 連接,使用執行 DAC90802EVM GUI 軟體的 Opal Kelly FPGA 卡 (XEM7310A-75T 或 XEM7310A-200T) 進行控制。此外,接頭連接器還提供對一般數位針腳的連接,以進行功能驗證與裝置測試。
使用指南: PDF | HTML
支援產品和硬體
封裝 針腳 CAD 符號、佔位空間與 3D 模型
HTQFP (PHP) 48 Ultra Librarian

訂購與品質

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款。

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片