DP83843
- IEEE 802.3 ENDEC with AUI/10BASE-T transceivers
and built-in filters - IEEE 802.3u 100BASE-TX compatible - directly drives
standard Category 5 UTP, no need for external
100BASE-TX transceiver - Fully Integrated and fully compliant ANSI X3.263 TPPMD
physical sublayer which includes adaptive equalization
and BLW compensation - IEEE 802.3u 100BASE-FX compatible - connects directly
to industry standard Electrical/Optical transceivers - IEEE 802.3u Auto-Negotiation for automatic speed selection
- IEEE 802.3u compatible Media Independent Interface
(MII) with Serial Management Interface - Integrated high performance 100 Mb/s clock recovery
circuitry requiring no external filters - Full Duplex support for 10 and 100 Mb/s data rates
- MII Serial 10 Mb/s mode
- Fully configurable node/switch and 100Mb/s repeater
modes - Programmable loopback modes for flexible systemdiagnostics
- Flexible LED support
- Single register access to complete PHY status
- MDIO interrupt support
- Individualized scrambler seed for 100BASE-TX applications
using multiple PHYs - Low power consumption for multi-port applications
- Small footprint 80-pin PQFP package
The DP83843BVJE is a full feature Physical Layer device with integrated PMD sublayers to support both 10BASE-T and 100BASE-X Ethernet protocols.
This VLSI device is designed for easy implementation of 10/100 Mb/s Ethernet LANs. It interfaces directly to Twisted Pair media through an external transformer or to fiber media via industry standard electrical/optical fiber PMD transceivers. This device also interfaces directly to the MAC layer through the IEEE 802.3u standard Media Independent Interface (MII), ensuring interoperability between products from different vendors.
The DP83843 is designed with National Semiconductor’s advanced CMOS process. Its system architecture is based on the integration of several of National's industry proven core technologies:
- IEEE 802.3 ENDEC with AUI/10BASE-T transceiver module to provide the 10 Mb/s functions
- Clock Recovery/Generator Modules fromNational's Fast Ethernet and FDDI products
- FDDI Stream Cipher scrambler/descrambler for TP-PMD
- 100BASE-Xphysical codingsub-layer (PCS) andcontrol logic that integrates the core modules into a dual speed Ethernet physical layer controller
- ANSI X3T12 Compliant TP-PMD Transceiver technology with Baseline Wander (BLW) compensation
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | DP83843 PHYTER datasheet (Rev. B) | 2013/11/13 | |||
| 應用說明 | How to Pass IEEE Ethernet Compliance Tests | PDF | HTML | 2021/9/20 | |||
| 應用說明 | AN-1506 DP83843 to DP83848C/I/YB PHYTER System Rollover Document (Rev. A) | 2013/4/26 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
ETHERNET-SW — 乙太網路 PHY 驅動程式和工具
德州儀器乙太網路實體層 (PHY) 收發器的驅動程式支援透過序列管理介面 (MDC/MDIO) 進行通訊，以配置及讀取 PHY 暫存器。如需 Linux 和 RTOS 驅動程式，請前往我們的 github。
USB-2-MDIO — USB-2-MDIO Tool v1.0
USB-2-MDIO 軟體工具可讓德州儀器的乙太網路 PHY 存取 MDIO 狀態和裝置控制暫存器。 USB-2-MDIO 工具包括 LaunchPad™ 開發套件，適用於與輕型 GUI 連接的 TI MSP430™ MCU。 LaunchPad 開發套件實作 MDIO 匯流排控制器，可處理連接匯流排之 PHY 上的暫存器。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| QFP (NNC) | 80 | Ultra Librarian |