DS125DF111
- Pin Compatible Retimer Family
- DS110DF111 with DFE: 8.5 – 11.3 Gbps
- DS125DF111 with DFE: 9.8 – 12.5 Gbps
- Adaptive CTLE: 33 dB Max Boost at 6.25 GHz
- Self Tuning 5-Tap DFE
- Raw Equalized and Retimed Data Loopback
- Adjustable Transmit VOD: 600 to 1300 mVp-p
- Settable Tx De-Emphasis Driver 0 to –12dB
- Low Power Consumption: 220 mW/Channel
- Locks to Half/Quarter/Eighth Data Rates for
Legacy Support - On-Chip Eye Monitor (EOM), PRBS Generator
- Input Signal Detection, CDR Lock
Detection/Indicator - Single 3.3-V or 2.5-V Power Supply
- SMBus, EEPROM, or Pin Based Configuration
- 4-mm × 4-mm, 24-Pin WQFN Package
- Operating Temp Range: –40°C to 85°C
The DS125DF111 is a dual channel (1-lane bidirectional) retimer with integrated signal conditioning. The DS125DF111 includes an input Continuous-Time Linear Equalizer (CTLE), clock and data recovery (CDR) and transmit driver on each channel.
The DS125DF111 with its on-chip Decision Feedback Equalizer (DFE) can enhance the reach and robustness of long, lossy, cross-talk-impaired high speed serial links to achieve BER < 1x10–15. For less demanding applications/interconnects, the DFE can be switched off and achieve the same BER performance. The DS125DF111 and DS110DF111 devices are pin-compatible.
Each channel of the DS125DF111 independently locks to specific serial data at data rates from 9.8 to 12.5 Gbps or to any supported sub-rate of these data rates. This simplifies system design and lowers overall cost.
Programmable transmit de-emphasis driver offers precise settings to meet the SFF-8431 output eye template. The fully adaptive receive equalization (CTLE and DFE) enables longer distance transmission in lossy copper interconnect and backplanes with multiple connectors. The CDR function is ideal for use in front port parallel optical module applications to reset the jitter budget and retime high speed serial data.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | DS125DF111 Multi-Protocol 2-Channel 9.8 - 12.5 Gb/s Retimer datasheet (Rev. A) | PDF | HTML | 2015/6/30 | ||
| 應用說明 | Extend reach with Ethernet Redrivers and Retimers for 10G-12.5G Applications (Rev. A) | 2023/1/31 | ||||
| Application brief | DS110DF111,DS125DF111, DS100DF410, DS110DF410, and DS125DF410 Programming Guide | 2019/3/25 | ||||
| 應用說明 | Understanding EEPROM Programming for 10G to 12.5G Retimers | PDF | HTML | 2016/1/13 | |||
| 應用說明 | Selecting TI SigCon Devices for SFF-8431 SFP+ Applications | 2014/5/6 |
設計與開發
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DS125DF111EVM — DS125DF111EVM：9.8-12.5 Gbps 重定時器評估模組
DS125DF111EVM 是一個具備 SMA 介面的高頻寬平台，可評估具有整合式訊號調整的 DS125DF111 雙通道（1 通道雙向）重定時器。DS125DF111 包含各通道上的輸入連續時間線性等化器 (CTLE)、時脈與資料恢復 (CDR) 和傳輸驅動器。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WQFN (RTW) | 24 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。