DS90LV019
- LVDS Signaling
- 3.3V or 5.0V operation
- Low power CMOS design
- Balanced Output Impedance
- Glitch free power up/down (Driver disabled)
- High Signaling Rate Capacity (above 100 Mbps)
- Ultra Low Power Dissipation
- ±1V Common-Mode Range
- ±100 mV Receiver Sensitivity
- Product offered in SOIC and TSSOP packages
- Flow-Through Pin Out
- Industrial Temperature Range Operation
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
The DS90LV019 is a Driver/Receiver designed specifically for the high speed low power point-to-point interconnect applications. The device operates from a single 3.3V or 5.0V power supply and includes one differential line driver and one receiver. The DS90LV019 features an independent driver and receiver with TTL/CMOS compatibility (DIN and ROUT). The logic interface provides maximum flexibility as 4 separate lines are provided (DIN, DE, RE#, and ROUT). The device also features a flow-through pin out which allows easy PCB routing for short stubs between its pins and the connector. The driver has 3.5 mA output loop current.
The driver translates between TTL levels (single-ended) to Low Voltage Differential Signaling levels. This allows for high speed operation, while consuming minimal power with reduced EMI. In addition, the differential signaling provides common-mode noise rejection.
The receiver threshold is ±100 mV over a ±1V common-mode range and translates the low swing differential levels to standard (TTL/CMOS) levels.
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技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | DS90LV019 3.3V or 5V LVDS Driver/Receiver datasheet (Rev. B) | 2004/5/14 | |||
| 應用說明 | An Overview of LVDS Technology | 1998/10/5 |
設計與開發
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DS90LV047-48AEVM — DS90LV047-48AEVM 評估模組
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOIC (D) | 14 | Ultra Librarian |
| TSSOP (PW) | 14 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。