DS90UB981-Q1
- Single or dual port MIPI DSI receiver
- Compliant to D-PHY v1.2 and DSI v1.3.1
- Packed 16/18/24/30-bit RGB and 16-bit YCbCr
- Loosely packed 18-bit RGB and 20-bit 4:2:2
- 1 clock lane and 1-4 configurable data lanes per D-PHY Port
- Up to 2.5 Gbps/lane with skew calibration
- Supports data lane swap and polarity inversion
- Supports both burst and non-burst mode
- SuperFrame Unpacking Capability
- Suitable for 4K at 60Hz video resolution
- FPD-Link IV interface
- Supports 10.8/6.75/3.375Gbps per channel; Up to 21.6Gbps over dual channels
- Coax/STP interconnect support
- Port Splitting to enable Y-cable interfaces
- Ultra-low latency control channel
- Two I2C up to 1MHz (up to 3.4MHz for local bus access)
- High speed GPIOs
- Backwards compatible
- 720P 92x and 1080P/2K 94x product families
- ADAS 936, 954, 960, 962, 9702, 9722 deserializers
- Security and diagnostics
- Voltage and temperature monitoring
- Line Fault Detection
- BIST and pattern generation
- CRC and error diagnostics
- Unique ID for counterfeit protection
- ECC on control bits
- Advanced link robustness and EMC control
- Data scrambling
- Spread spectrum clocking generation (SSCG)
- Low power operation
- 1.8V and 1.1V dual power supply
- AEC-Q100 qualified for automotive applications
- AEC-Q100 grade-level 2: −40℃ to +105℃
- 64 pin QFN Wettable flanks 9mm x 9mm
- ISO 10605 and IEC 61000-4-2 ESD compliant
DS90UB981-Q1 is a MIPI DSI to FPD-Link III/IV bridge device. In conjunction with an FPD-Link IV deserializer, the chipset provides a high-speed serialized interface over low-cost 50Ω coax or STP cables. The DS90UB981-Q1 is a D-PHY v1.2 compliant device that serializes a MIPI DSI input supporting video resolutions including 4K with 30-bit color depth. The FPD-Link IV interface supports video and audio data transmission and full duplex control, including I2C and GPIO data over a single channel or dual channels. Consolidation of video data and control over two FPD-Link IV lanes reduces the interconnect size and weight and simplifies system design. EMI is minimized by the use of low voltage differential signaling, data scrambling, SSCG, and randomization. In backward compatible mode, the devices supports up to 720p and 1080p resolutions with 24-bit color depth over a single/dual link. In ADAS compatible mode, the device is interoperable with 936, 95x, 96x & 97x deserializers supporting resolutions up to 8MP+/40fps.
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技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | DS90UB981-Q1 4K DSI to FPD-Link IV Bridge Serializer datasheet | PDF | HTML | 2024/2/22 | ||
| 應用說明 | I2C Mechanisms in IVI FPD-Link IV Devices | PDF | HTML | 2026/7/24 |
設計與開發
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DS90UB981-Q1CEVM — 適用於同軸纜線應用的 DS90UB981-Q1 MIPI DSI 至 FPD-Link IV 橋接串聯器評估模組
DS90UB981-Q1CEVM 是用於評估 DS90UB981-Q1 MIPI DSI 至 FPD-Link IV 串聯器的評估模組。 DS90UB981-Q1 支援超高解析度,包括在 60Hz 下每像素 30 位元的 4K。裝置配備 2 個 D-PHY 接收器 (最多 4 通道 + 1 時鐘),每通道支援高達 2.5 Gbps,總頻寬為每埠 10 Gbps,而 FPD-Link 介面在 FPD-Link IV 模式下支援每通道最高 10.8 Gbps,或在 FPD-Link III 模式下支援每通道最高 3.675 Gbps。DS90UB981-Q1CEVM 的 FPD-Link (...)
DS90UB981-Q1EVM — DS90UB981-Q1 DSI 至 FPD-Link IV 橋接串聯器評估模組
DS90UB981-Q1MEVM — DS90UB981-Q1 4K DSI 至 FPD-Link IV 橋接器串聯器評估模組
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFNP (RTD) | 64 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。