DS91M040

現行

125-MHz 四 M-LVDS 收發器

產品詳細資料

Function Transceiver Protocols BLVDS, CML, LVDS, LVPECL, M-LVDS Number of transmitters 4 Number of receivers 4 Signaling rate (Mbps) 250 Input signal BLVDS, CML, LVCMOS, LVDS, LVPECL, LVTTL, M-LVDS Output signal LVCMOS, LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Transceiver Protocols BLVDS, CML, LVDS, LVPECL, M-LVDS Number of transmitters 4 Number of receivers 4 Signaling rate (Mbps) 250 Input signal BLVDS, CML, LVCMOS, LVDS, LVPECL, LVTTL, M-LVDS Output signal LVCMOS, LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
WQFN (RTV) 32 25 mm² (5 mm × 5 mm)
  • DC - 125 MHz / 250 Mbps Low Jitter, Low Skew, Low Power Operation
  • Wide Input Common Mode Voltage Range Allows up to ±1V of GND Noise
  • Conforms to TIA/EIA-899 M-LVDS Standard
  • Pin Selectable M-LVDS Receiver Type (1 or 2)
  • Controlled Transition Times (2.0 ns typ) Minimize Reflections
  • 8 kV ESD on M-LVDS I/O pins protects adjoining components
  • Flow-Through Pinout Simplifies PCB Layout
  • Small 5 mm x 5 mm WQFN-32 Space Saving Package

All trademarks are the property of their respective owners.

  • DC - 125 MHz / 250 Mbps Low Jitter, Low Skew, Low Power Operation
  • Wide Input Common Mode Voltage Range Allows up to ±1V of GND Noise
  • Conforms to TIA/EIA-899 M-LVDS Standard
  • Pin Selectable M-LVDS Receiver Type (1 or 2)
  • Controlled Transition Times (2.0 ns typ) Minimize Reflections
  • 8 kV ESD on M-LVDS I/O pins protects adjoining components
  • Flow-Through Pinout Simplifies PCB Layout
  • Small 5 mm x 5 mm WQFN-32 Space Saving Package

All trademarks are the property of their respective owners.

The DS91M040 is a quad M-LVDS transceiver designed for driving / receiving clock or data signals to / from up to four multipoint networks.

M-LVDS (Multipoint LVDS) is a new family of bus interface devices based on LVDS technology specifically designed for multipoint and multidrop cable and backplane applications. It differs from standard LVDS in providing increased drive current to handle double terminations that are required in multi-point applications. Controlled transition times minimize reflections that are common in multipoint configurations due to unterminated stubs. M-LVDS devices also have a very large input common mode voltage range for additional noise margin in heavily loaded and noisy backplane environments.

A single DS91M040 channel is a half-duplex transceiver that accepts LVTTL/LVCMOS signals at the driver inputs and converts them to differential M-LVDS signal levels. The receiver inputs accept low voltage differential signals (LVDS, BLVDS, M-LVDS, LVPECL and CML) and convert them to 3V LVCMOS signals. The DS91M040 supports both M-LVDS type 1 and type 2 receiver inputs.

The DS91M040 is a quad M-LVDS transceiver designed for driving / receiving clock or data signals to / from up to four multipoint networks.

M-LVDS (Multipoint LVDS) is a new family of bus interface devices based on LVDS technology specifically designed for multipoint and multidrop cable and backplane applications. It differs from standard LVDS in providing increased drive current to handle double terminations that are required in multi-point applications. Controlled transition times minimize reflections that are common in multipoint configurations due to unterminated stubs. M-LVDS devices also have a very large input common mode voltage range for additional noise margin in heavily loaded and noisy backplane environments.

A single DS91M040 channel is a half-duplex transceiver that accepts LVTTL/LVCMOS signals at the driver inputs and converts them to differential M-LVDS signal levels. The receiver inputs accept low voltage differential signals (LVDS, BLVDS, M-LVDS, LVPECL and CML) and convert them to 3V LVCMOS signals. The DS91M040 supports both M-LVDS type 1 and type 2 receiver inputs.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 DS91M040 125 MHz Quad M-LVDS Transceiver datasheet (Rev. M) 2013/4/16
Application brief How Far, How Fast Can You Operate MLVDS? 2018/8/6
應用說明 Designing an ATCA Compliant M-LVDS Clock Distribution Network (Rev. B) 2013/4/26
應用說明 Introduction to M-LVDS (TIA/EIA-899) (Rev. A) 2013/1/3
使用指南 SMA to RJ45 Adapter Board User Guide 2012/1/26

設計與開發

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開發板

DS91M040EVK — 125 MHz 四路 M-LVDS 收發器評估板

The DS91M040EVK is an evaluation board designed to evalaute all of the features and functions of the DS91M040 device. The DS91M040 device is a high-speed quad M-LVDS differential transceiver designed for multipoint applications with multiple drivers or receivers. The device (...)

使用指南: PDF
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介面轉接器

SMA2RJ45EVK — SMA 至 RJ45 轉接板

The SMA2RJ45EVK is an SMA connector to RJ45 connector adapter boards developed to complement Texas Instruments' evaluation boards for which evaluation with CAT5e cable assemblies may be desirable (such as the DriveCable02EVK, LVDS-18B-EVK, DS25BR100EVK, and others).

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模擬型號

DS91M040 IBIS Model

SNLM032.ZIP (47 KB) - IBIS 模型
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
WQFN (RTV) 32 Ultra Librarian

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