DS91M125
- DC - 125 MHz / 250 Mbps Low Jitter, Low Skew, Low Power Operation
- Independent Driver Enable Pins
- Outputs Conform to TIA/EIA-899 M-LVDS Standard
- Controlled Transition Times Minimize Reflections
- Inputs Conform to TIA/EIA-644-A LVDS Standard
- 8 kV ESD on M-LVDS Output Pins Protects Adjoining Components
- Flow-Through Pinout Simplifies PCB Layout
- Industrial Operating Temperature Range (−40°C to +85°C)
- Available in a Space Saving SOIC-16 Package
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The DS91M125 is a 1:4 M-LVDS repeater designed for driving and distributing clock or data signals to up to four multipoint networks.
M-LVDS (Multipoint LVDS) is a new family of bus interface devices based on LVDS technology specifically designed for multipoint and multidrop cable and backplane applications. It differs from standard LVDS in providing increased drive current to handle double terminations that are required in multi-point applications. Controlled transition times minimize reflections that are common in multipoint configurations due to unterminated stubs.
A single DS91M125 channel is a 1:4 repeater that accepts M-LVDS/LVDS/CML/LVPECL signals and converts them to M-LVDS signal levels. Each output has an associated independent driver enable pin. The DS91M125 input conforms to the LVDS standard.
The DS91M125 has a flow-through pinout for easy PCB layout. It provides a new alternative for high speed multipoint interface applications. It is packaged in a space saving SOIC-16 package.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | DS91M125 125 MHz 1:4 M-LVDS Repeater with LVDS Input datasheet (Rev. C) | 2013/4/16 | |||
| 應用說明 | An Introduction to M-LVDS and Clock and Data Distribution Applications (Rev. C) | PDF | HTML | 2023/6/22 | |||
| Application brief | How Far, How Fast Can You Operate MLVDS? | 2018/8/6 | ||||
| 應用說明 | Introduction to M-LVDS (TIA/EIA-899) (Rev. A) | 2013/1/3 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOIC (D) | 16 | Ultra Librarian |