DS92LV8028

現行

8 通道 10:1 串聯器

產品詳細資料

Function Serializer Protocols Channel-Link I Number of transmitters 8 Number of receivers 8 Supply voltage (V) 3.3 Signaling rate (Mbps) 5280 Input signal LVCMOS, LVTTL Output signal BLVDS, LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Serializer Protocols Channel-Link I Number of transmitters 8 Number of receivers 8 Supply voltage (V) 3.3 Signaling rate (Mbps) 5280 Input signal LVCMOS, LVTTL Output signal BLVDS, LVDS Rating Catalog Operating temperature range (°C) -40 to 85
NFBGA (NZH) 196 225 mm² 15 x 15
  • All 8 Channels Synchronous to One Parallel Clock Rate, from 25 to 66 MHz
  • Duplicates Function of Multiple DS92LV1021 and '1023 10-bit Serializer Devices
  • Serializes from One to Eight 10-bit Parallel Inputs into Data Streams with Embedded Clock
  • Eight 5 mA Modified Bus LVDS Outputs that are Capable to Drive Double Terminations
  • @Speed Test - PRBS Generation to Check LVDS Transmission Path to SCAN921224 or SCAN921260
  • On Chip Filtering for PLL
  • 740mW Typ Power Dissipation (Loaded, PRBS, 66MHz, 3.3V)
  • High Impedance Inputs and Outputs on Power Off
  • Single Power Supply at +3.3V (+/-10%)
  • 196-Pin NFBGA Package
  • JTAG Pins Reserved for Next Version of Device
  • Industrial Temperature Range Operation: -40 to +85 °C

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  • All 8 Channels Synchronous to One Parallel Clock Rate, from 25 to 66 MHz
  • Duplicates Function of Multiple DS92LV1021 and '1023 10-bit Serializer Devices
  • Serializes from One to Eight 10-bit Parallel Inputs into Data Streams with Embedded Clock
  • Eight 5 mA Modified Bus LVDS Outputs that are Capable to Drive Double Terminations
  • @Speed Test - PRBS Generation to Check LVDS Transmission Path to SCAN921224 or SCAN921260
  • On Chip Filtering for PLL
  • 740mW Typ Power Dissipation (Loaded, PRBS, 66MHz, 3.3V)
  • High Impedance Inputs and Outputs on Power Off
  • Single Power Supply at +3.3V (+/-10%)
  • 196-Pin NFBGA Package
  • JTAG Pins Reserved for Next Version of Device
  • Industrial Temperature Range Operation: -40 to +85 °C

All trademarks are the property of their respective owners.

The DS92LV8028 integrates eight serializer devices into a single chip. The DS92LV8028 can simultaneously serialize up to eight 10-bit data streams. The 10-bit parallel inputs are LVTTL signal levels. The serialized outputs are LVDS signals with extra drive current for point-to-point and lightly loaded multidrop applications. Each serializer block in the DS92LV8028 operates independently by using strobes from a single shared PLL.

The DS92LV8028 uses a single +3.3V power supply with a typical power dissipation of 740mW (3.3V / PRBS / 66 MHz). Each serializer channel has a unique power down control to further conserve power consumption.

For high-speed LVDS serial data transmission, line quality is essential, thus the DS92LV8028 includes an @SPEED TEST function. Each Serializer channel has the ability internally generated a PRBS data pattern. This pattern is received by specific deserializers (SCAN921224) which have the complement PRBS verification circuit. The deserializer checks the data pattern for bit errors and reports any errors on the test verification pins on the deserializer.

For additional information - please see the section in this datasheet.

The DS92LV8028 integrates eight serializer devices into a single chip. The DS92LV8028 can simultaneously serialize up to eight 10-bit data streams. The 10-bit parallel inputs are LVTTL signal levels. The serialized outputs are LVDS signals with extra drive current for point-to-point and lightly loaded multidrop applications. Each serializer block in the DS92LV8028 operates independently by using strobes from a single shared PLL.

The DS92LV8028 uses a single +3.3V power supply with a typical power dissipation of 740mW (3.3V / PRBS / 66 MHz). Each serializer channel has a unique power down control to further conserve power consumption.

For high-speed LVDS serial data transmission, line quality is essential, thus the DS92LV8028 includes an @SPEED TEST function. Each Serializer channel has the ability internally generated a PRBS data pattern. This pattern is received by specific deserializers (SCAN921224) which have the complement PRBS verification circuit. The deserializer checks the data pattern for bit errors and reports any errors on the test verification pins on the deserializer.

For additional information - please see the section in this datasheet.

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* Data sheet DS92LV8028 8 Channel 10:1 Serializer datasheet (Rev. I) 2013年 4月 22日

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DS92LV8028 IBIS Model

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