LMH0050

現行

具 LVDS 介面的 HD/ SD/ DVB-ASI SDI 串聯器

產品詳細資料

Function Serializer Supply voltage (V) 2.5, 3.3 Power consumption (mW) 460 Data rate (max) (Mbps) 1485 Control interface Pin/SMBus Operating temperature range (°C) -40 to 85
Function Serializer Supply voltage (V) 2.5, 3.3 Power consumption (mW) 460 Data rate (max) (Mbps) 1485 Control interface Pin/SMBus Operating temperature range (°C) -40 to 85
WQFN (RHS) 48 49 mm² 7 x 7
  • LVDS Interface to Host FPGA
  • No External VCO or Clock Ref Required
  • Integrated Variable Output Cable Driver
  • 3.3V SMBus Configuration Interface
  • Integrated TXCLK PLL Cleans Clock Noise
  • Small 48-Pin WQFN Package
  • Industrial Temperature range: -40°C to 85°C

Key Specifications

  • Output Compliant With SMPTE 424M, SMPTE 292M, SMPTE 259M-C and DVB-ASI
  • Typical Power Dissipation: 440 mW
  • 30 ps Typical Output Jitter (HD, 3G)

All trademarks are the property of their respective owners.

  • LVDS Interface to Host FPGA
  • No External VCO or Clock Ref Required
  • Integrated Variable Output Cable Driver
  • 3.3V SMBus Configuration Interface
  • Integrated TXCLK PLL Cleans Clock Noise
  • Small 48-Pin WQFN Package
  • Industrial Temperature range: -40°C to 85°C

Key Specifications

  • Output Compliant With SMPTE 424M, SMPTE 292M, SMPTE 259M-C and DVB-ASI
  • Typical Power Dissipation: 440 mW
  • 30 ps Typical Output Jitter (HD, 3G)

All trademarks are the property of their respective owners.

The LMH0340/0040/0070/0050 SDI Serializers are part of TI’s family of FPGA-Attach SER/DES products supporting 5-bit LVDS interfaces with FPGAs. An FPGA Host will format data with supplied IP such that the output of the LMH0340 is compliant with the requirements of DVB-ASI, SMPTE 259M-C, SMPTE 292M and SMPTE 424M standards. See for details on which Standards are supported per device.

The interface between the SER (Serializer) and the FPGA consists of a 5 bit wide LVDS data bus, an LVDS clock and an SMBus interface. The LMH0340/0040/0070 SER devices include an integrated cable driver which is fully compliant with all of the SMPTE specifications listed above. The LMH0050 has a CML output driver that can drive a differential transmission line or interface to a cable driver.

The FPGA-Attach SER/DES family is supported by a suite of IP which allows the design engineer to quickly develop video applications using the SER/DES products. The SER is packaged in a physically small 48-pin WQFN package.

The LMH0340/0040/0070/0050 SDI Serializers are part of TI’s family of FPGA-Attach SER/DES products supporting 5-bit LVDS interfaces with FPGAs. An FPGA Host will format data with supplied IP such that the output of the LMH0340 is compliant with the requirements of DVB-ASI, SMPTE 259M-C, SMPTE 292M and SMPTE 424M standards. See for details on which Standards are supported per device.

The interface between the SER (Serializer) and the FPGA consists of a 5 bit wide LVDS data bus, an LVDS clock and an SMBus interface. The LMH0340/0040/0070 SER devices include an integrated cable driver which is fully compliant with all of the SMPTE specifications listed above. The LMH0050 has a CML output driver that can drive a differential transmission line or interface to a cable driver.

The FPGA-Attach SER/DES family is supported by a suite of IP which allows the design engineer to quickly develop video applications using the SER/DES products. The SER is packaged in a physically small 48-pin WQFN package.

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類型 標題 日期
* Data sheet LMH0340/040/070/050 3Gbps, HD, SD, DVB-ASI SDI Serializr & Cable Drvr w/LVDS I/F datasheet (Rev. I) 2013年 4月 16日
Application note AN-1943 Understanding Serial Digital Video Bit Rates (Rev. A) 2013年 4月 26日
Application note AN-1988 LMH0340 / LMH0341 SerDes Family LVDS Timing Overview (Rev. A) 2013年 4月 26日
Application note AN-2145 Power Considerations for SDI Products (Rev. B) 2013年 4月 26日
Application note AN-2146 Power Design for SDI and Other Noise-Sensitive Devices (Rev. A) 2013年 4月 26日
Application note High-Speed Board Layout Challenges in FPGA/SDI Sub-Systems 2009年 11月 12日
Application note A 3 Gbps SDI Connectivity Solution Supporting Uncompressed 1080p60 Video 2008年 3月 18日

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程式碼範例或展示

SDXILIP Xilinx Spartan Example Code

We have developed a family of serializers and deserializers intended to support the serial digital interface (SDI) standards of the Society of Motion Picture and Television Engineers (SMPTE). These devices connect to a host FPGA through a moderate speed, moderate width (600 Mbps, 5 bits wide) (...)

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產品
序列數位介面 (SDI) IC
LMH0040 具 LVDS 介面的 HD、SD、DVB-ASI SDI 串聯器和驅動器 LMH0041 具迴路輸出和 LVDS 介面的 HD、SD、DVB-ASI SDI 解串器 LMH0050 具 LVDS 介面的 HD/ SD/ DVB-ASI SDI 串聯器 LMH0051 具 LVDS 介面的 HD/SD/DVB-ASI SDI 解串器 LMH0070 具 LVDS 介面的 SD/ DVB-ASI SDI 串聯器和驅動器 LMH0071 具迴路通過和 LVDS 介面的 SD/ DVB-ASI SDI 解串器
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