LMK1C1102-Q1
- High-performance 1:2, 1:4, 1:6 and 1:8 LVCMOS clock buffer
- Very low output skew:
- LMK1C1102-Q1 and LMK1C1104-Q1
- < 50ps
- LMK1C1106-Q1 and LMK1C1108-Q1
- < 55ps
- LMK1C1102-Q1 and LMK1C1104-Q1
- Extremely low additive jitter:
- LMK1C1102-Q1 and LMK1C1104-Q1
- 7.5fs typical at VDD = 3.3V
- 10fs typical at VDD = 2.5V
- 19.2fs typical at VDD = 1.8V
- LMK1C1106-Q1 and LMK1C1108-Q1
- 12fs typical at VDD = 3.3V
- 15fs typical at VDD = 2.5V
- 28fs typical at VDD = 1.8V
- LMK1C1102-Q1 and LMK1C1104-Q1
- Very low propagation delay < 3ns
- Synchronous output enable
- Supply voltage: 3.3V, 2.5V, or 1.8V
- 3.3V tolerant input at all supply voltages
- Fail-safe inputs
- fmax = 250MHz for 3.3V fmax = 200MHz for 2.5V and 1.8V
- Automotive Grade 1 (–40°C to 125°C)
- AEC-Q100 qualified
- Available in:
- 14 and 16-Pin TSSOP Package
- 8-Pin WSON Package
The LMK1C110x-Q1 is a modular, high-performance, low-skew, general-purpose clock buffer family from Texas Instruments. The entire family is designed with a modular approach in mind. Five different fan-out variations, 1:2, 1:4, 1:6 and 1:8 are available.
All family members share the same high performing characteristics such as low additive jitter, low skew, and wide operating temperature range.
The LMK1C110x-Q1 supports a synchronous output enable control (1G) which switches the outputs into a low state when 1G is low. These devices have a fail-safe input that prevents oscillation at the outputs in the absence of an input signal and allows for input signals before VDD is supplied.
The LMK1C110x-Q1 family are available in an Automotive Grade 1 (–40°C to 125°C) and AEC-Q100 qualified.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | LMK1C110x-Q1 1.8V, 2.5V, and 3.3V Low Noise LVCMOS Clock Buffer Family datasheet | PDF | HTML | 2026/3/25 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
LMK1C1104EVM — LMK1C1104 低抖動 1:4 LVCMOS 扇出緩衝器評估模組
PLLATINUMSIM-SW — PLL 迴路濾波器、相位雜訊、鎖定時間與雜散模擬工具
PLLATINUMSIM-SW 為一模擬工具,可讓使用者建立 PLLatinum™ 積體電路的詳細設計和模擬,包括 LMX 系列的相位鎖定迴路 (PLL) 及合成器。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WSON (DQF) | 8 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。