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RS-485 & RS-422 收發器

SN65HVD12

現行

3.3V 差分收發器

立即訂購
產品規格表

SN65HVD12

現行
產品規格表 立即訂購

產品詳細資料

Number of receivers 1 Number of transmitters 1 Duplex Half Signaling rate (max) (Mbps) 1 Fault protection (V) -9 to 14 Common-mode range (V) -7 to 12 Number of nodes 256 Isolated No Supply current (max) (µA) 15500 Rating Catalog Operating temperature range (°C) -40 to 85
Number of receivers 1 Number of transmitters 1 Duplex Half Signaling rate (max) (Mbps) 1 Fault protection (V) -9 to 14 Common-mode range (V) -7 to 12 Number of nodes 256 Isolated No Supply current (max) (µA) 15500 Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 8 29.4 mm² (4.9 mm × 6 mm) PDIP (P) 8 92.5083 mm² (9.81 mm × 9.43 mm)
  • Operates with a 3.3-V supply
  • Bus-pin ESD protection exceeds 16-kV HBM
  • 1/8 Unit-load option available (up to 256 nodes on the bus)
  • Optional driver output transition times for signaling rates (1)of 1 Mbps, 10 Mbps, and 32 Mbps
  • Meets or exceeds the requirements of ANSI TIA/EIA-485-A
  • Bus-pin short-circuit protection from –7 V to 12 V
  • Low-current standby mode: 1 µA, typical
  • Open-circuit, idle-bus, and shorted-bus fail-safe receiver
  • Thermal shutdown protection
  • Glitch-free power-up and power-down protection for hot-plugging applications
  • SN75176 footprint

(1)The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).
  • Operates with a 3.3-V supply
  • Bus-pin ESD protection exceeds 16-kV HBM
  • 1/8 Unit-load option available (up to 256 nodes on the bus)
  • Optional driver output transition times for signaling rates (1)of 1 Mbps, 10 Mbps, and 32 Mbps
  • Meets or exceeds the requirements of ANSI TIA/EIA-485-A
  • Bus-pin short-circuit protection from –7 V to 12 V
  • Low-current standby mode: 1 µA, typical
  • Open-circuit, idle-bus, and shorted-bus fail-safe receiver
  • Thermal shutdown protection
  • Glitch-free power-up and power-down protection for hot-plugging applications
  • SN75176 footprint

(1)The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).

The SN65HVD10, SN75HVD10, SN65HVD11, SN75HVD11, SN65HVD12, and SN75HVD12 bus transceivers all combine a 3-state differential line driver, as well as a differential input line receiver that operates with a single 3.3-V power supply. They are designed for balanced transmission lines and meet or exceed ANSI standard TIA/EIA-485-A and ISO 8482:1993. These differential bus transceivers are monolithic integrated circuits, designed for bidirectional data communication on multipoint bus-transmission lines. The drivers and receivers have active-high and active-low enables, that can be externally connected together to function as direction control. Very low device standby supply current, can be achieved by disabling the driver and the receiver.

The driver differential outputs and receiver differential inputs connect internally to form a differential input/output (I/O) bus port, that is designed to offer minimum loading to the bus whenever the driver is disabled or VCC = 0. These parts feature wide positive and negative common-mode voltage ranges, making them suitable for party-line applications.

The SN65HVD10, SN75HVD10, SN65HVD11, SN75HVD11, SN65HVD12, and SN75HVD12 bus transceivers all combine a 3-state differential line driver, as well as a differential input line receiver that operates with a single 3.3-V power supply. They are designed for balanced transmission lines and meet or exceed ANSI standard TIA/EIA-485-A and ISO 8482:1993. These differential bus transceivers are monolithic integrated circuits, designed for bidirectional data communication on multipoint bus-transmission lines. The drivers and receivers have active-high and active-low enables, that can be externally connected together to function as direction control. Very low device standby supply current, can be achieved by disabling the driver and the receiver.

The driver differential outputs and receiver differential inputs connect internally to form a differential input/output (I/O) bus port, that is designed to offer minimum loading to the bus whenever the driver is disabled or VCC = 0. These parts feature wide positive and negative common-mode voltage ranges, making them suitable for party-line applications.
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技術文件

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 SNx5HVD1x 3.3-V RS-485 Transceivers datasheet (Rev. P) PDF | HTML 2022/2/16
類比設計期刊 2Q 2013 Issue Analog Applications Journal 2013/4/16
類比設計期刊 RS-485 failsafe biasing: Old versus new transceivers 2013/4/16
應用說明 RS-485 for E-Meter Applications (Rev. A) 2004/8/6
應用說明 The RS-485 Unit Load and Maximum Number of Bus Connections 2004/3/15

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開發板

RS485-HF-DPLX-EVM — RS-485 半雙工評估模組

RS-485 半雙工評估模組 (EVM) 可協助設計師評估裝置性能，其支援使用 SN65HVD1x、SN65HVD2x、SN65HVD7x、SN65HVD8x 和 SN65HVD96 半雙工收發器之一快速開發與分析資料傳輸系統。EVM 板出貨時並未將 RS-485 裝置焊接至電路板上。使用者可索取樣品或購買任何 TI RS-485 半雙工裝置，以進行評估。如需相容裝置的完整清單，請參閱 EVM 使用指南。
使用指南: PDF | HTML
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模擬型號

SN65HVD12, SN75HVD12 IBIS Model (Rev. C)

SLLC116B (38 KB) - IBIS 模型
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SOIC (D) 8 Ultra Librarian
PDIP (P) 8 Ultra Librarian
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