SN65LVDS1050
- Typically Meets or Exceeds ANSI TIA/EIA-644-1995 Standard
- Operates From a Single 2.4-V to 3.6-V Supply
- Signaling Rates up to 400 Mbit/s
- Bus-Terminal ESD Exceeds 12 kV
- Low-Voltage Differential Signaling With Typical Output Voltages of 285 mV and a 100
Load - Propagation Delay Times
- Driver: 1.7 ns Typ
- Receiver: 3.7 ns Typ
- Driver: 25-mW Typical
- Receiver: 60-mW Typical
- Power Dissipation at 200 MHz
- Driver: 25 mW Typical
- Receiver: 60 mW Typical
- LVTTL Input Levels Are 5 V Tolerant
- Receiver Maintains High Input Impedance
- Receiver Has Open-Circuit Fail Safe
- Available in Thin Shink Outline Packaging With 20-mil Lead Pitch
The SN65LVDS1050 is similar to the SN65LVDS050 except that it is characterized for operation with a lower supply voltage range and packaged in the thin shrink outline package for portable battery-powered applications.
The differential line drivers and receivers use low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400 Mbps. The drivers provide a minimum differential output voltage magnitude of 247 mV into a 100- load and receipt of 100-mV signals with up to 1 V of ground potential difference between a transmitter and receiver.
The intended application of this device and signaling technique is for point-to-point baseband data transmission over controlled impedance media of approximately 100- characteristic impedance. The transmission media may be printed-circuit board traces, backplanes, or cables. Note: The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment and other application-specific characteristics.
The SN65LVDS1050 is characterized for operation from –40°C to 85°C.
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技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | High-Speed Differential Line Drivers And Receivers datasheet (Rev. B) | 2003/4/29 | |||
| Application brief | LVDS to Improve EMC in Motor Drives | 2018/9/27 | ||||
| Application brief | How Far, How Fast Can You Operate LVDS Drivers and Receivers? | 2018/8/3 | ||||
| Application brief | How to Terminate LVDS Connections with DC and AC Coupling | 2018/5/16 |
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| TSSOP (PW) | 16 | Ultra Librarian |
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