THS6302
- Designed for G.Fast 106-MHz, 212-MHz DSL Profiles
- G.mgFast 424-MHz Compatible
- Supports legacy VDSL and ADSL2+ Applications
- Excellent MTPR for G.Fast and Legacy Applications (Line Power = 8 dBm):
- ADSL2+ = 75 dB
- VDSL-17a = 74 dB
- VDSL-30a = 70 dB
- G.Fast 106-MHz = 60 dB
- G.Fast 212-MHz = 48 dB
- Multiple Power Modes for Different Profiles
- Adjustable Bias Current with External Resistor
- Differential Gain: 11 V/V
- Linear Output Current: 80 mA (Minimum)
- Low-Power Line Termination Mode: <7 mA
- Power-Down Mode
- 12-V Technology to Support High-Power Output
- 12.6-V Maximum Operational Voltage
The THS6302 is a dual port, current-feedback architecture, differential line driver designed for G.Fast and a variety of digital subscriber line (DSL) systems. The device is targeted for use in G.Fast digital subscriber line systems that enable native discrete multitone modulation (DMT) signals and supports an 8-dBm line power up to 212 MHz with good linearity.
The unique architecture of this device allows quiescent current to be minimal and still achieve very high linearity. Internally-fixed bias settings of the amplifiers offer enhanced power savings for line-driving modes where the full performance of the amplifier is not required. To allow for even more flexibility and power savings, the overall quiescent current for both ports is adjustable by a single external bias resistor connected to one of the device pins. The device also features two line-termination modes to maintain impedance matching at very low power consumption.
The THS6302 is a dual port device suitable for CO (Central Office) applications in DSL systems and is similar to the single port THS6301 device that is suitable in CPE (Customer-Premises Equipment) DSL applications.
THS6302 device is available in a 4-mm × 5-mm, 28-pin, VQFN package.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | THS6302 Dual Port, G.Fast and G.mgFast DSL Line Driver datasheet (Rev. A) | PDF | HTML | 2021年 2月 19日 |
| Application note | Noise Analysis for High Speed Op Amps (Rev. A) | 2005年 1月 17日 |
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RHF) | 28 | Ultra Librarian |
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