TPS53689

現行

具 VR14 SVID 和 PMBus 的雙通道 8 相位降壓數位多相 D-CAP+™ 控制器

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最新 TPS53689T 現行 具 VR14 SVID 和 PMBus 的雙通道 8 相位降壓數位多相 D-CAP+™ 控制器 This product supports native TLVR

產品詳細資料

Vin (min) (V) 4.5 Vin (max) (V) 17 Iout (max) (A) 765 Operating temperature range (°C) -40 to 125 Control mode D-CAP+ Topology Multiphase Rating Catalog Vout (min) (V) 0.25 Vout (max) (V) 5.5 Iq (typ) (A) 0.05
Vin (min) (V) 4.5 Vin (max) (V) 17 Iout (max) (A) 765 Operating temperature range (°C) -40 to 125 Control mode D-CAP+ Topology Multiphase Rating Catalog Vout (min) (V) 0.25 Vout (max) (V) 5.5 Iq (typ) (A) 0.05
WQFN (RSB) 40 25 mm² 5 x 5
  • Input voltage range: 4.5 V to 17 V
  • Output voltage range: 0.25 V to 5.5 V
  • Dual output supporting N+M phase configurations (N+M ≤ 8, M ≤ 4)
  • Intel VR14 SVID compliant with PSYS support
  • Backward compatible to VR13.HC/VR13.0 SVID
  • Automatic NVM fault status logging
  • Dynamic current limit for improved Fast-Vmode performance
  • Fully compatible with TI NexFET™ power stage for high-density solutions
  • Enhanced D-CAP+ control to provider superior transient performance with excellent dynamic current sharing
  • Dynamic phase shedding with programmable thresholds for optimizing efficiency at light and heavy loads
  • Configurable with non-volatile memory (NVM) for low external component count
  • Accurate, adjustable, adaptive voltage positioning (AVP, load line) support
  • Individual per-phase IMON calibration, with multi-slope gain calibration to increase system accuracy.
  • Fast phase-adding for transient undershoot reduction
  • Diode braking with programmable timeout for reduced transient overshoot
  • Patented AutoBalance™ current sharing
  • Programmable per-phase valley current limit (OCL)
  • PMBus™ v1.3.1 system interface for telemetry of voltage, current, power, temperature, and fault conditions
  • Programmable loop compensation through PMBus
  • Driverless configuration for efficient high- frequency switching
  • 5.00 mm × 5.00 mm, 40-pin, QFN package
  • Input voltage range: 4.5 V to 17 V
  • Output voltage range: 0.25 V to 5.5 V
  • Dual output supporting N+M phase configurations (N+M ≤ 8, M ≤ 4)
  • Intel VR14 SVID compliant with PSYS support
  • Backward compatible to VR13.HC/VR13.0 SVID
  • Automatic NVM fault status logging
  • Dynamic current limit for improved Fast-Vmode performance
  • Fully compatible with TI NexFET™ power stage for high-density solutions
  • Enhanced D-CAP+ control to provider superior transient performance with excellent dynamic current sharing
  • Dynamic phase shedding with programmable thresholds for optimizing efficiency at light and heavy loads
  • Configurable with non-volatile memory (NVM) for low external component count
  • Accurate, adjustable, adaptive voltage positioning (AVP, load line) support
  • Individual per-phase IMON calibration, with multi-slope gain calibration to increase system accuracy.
  • Fast phase-adding for transient undershoot reduction
  • Diode braking with programmable timeout for reduced transient overshoot
  • Patented AutoBalance™ current sharing
  • Programmable per-phase valley current limit (OCL)
  • PMBus™ v1.3.1 system interface for telemetry of voltage, current, power, temperature, and fault conditions
  • Programmable loop compensation through PMBus
  • Driverless configuration for efficient high- frequency switching
  • 5.00 mm × 5.00 mm, 40-pin, QFN package

The TPS53689 is a VR14 SVID compliant step down controller with two channels, built-in non-volatile memory (NVM), and PMBus™ interface, and is fully compatible with TI NexFET™ power stages. Advanced control features such as the D-CAP+ architecture with undershoot reduction (USR) and overshoot reduction (OSR) provide fast transient response, low output capacitance, and good dynamic current sharing. The device also provides novel phase interleaving strategy and dynamic phase shedding for efficiency improvement at different loads. Adjustable control of output voltage slew rate and adaptive voltage positioning are natively supported. In addition, the device supports the PMBus communication interface for reporting the telemetry of voltage, current, power, temperature, and fault conditions to the host system. All programmable parameters can be configured through the PMBus interface and can be stored in NVM as the new default values, to minimize the external component count.

The TPS53689 device is offered in a thermally enhanced 40-pin QFN packaged and is rated to operate from –40°C to 125°C.

The TPS53689 is a VR14 SVID compliant step down controller with two channels, built-in non-volatile memory (NVM), and PMBus™ interface, and is fully compatible with TI NexFET™ power stages. Advanced control features such as the D-CAP+ architecture with undershoot reduction (USR) and overshoot reduction (OSR) provide fast transient response, low output capacitance, and good dynamic current sharing. The device also provides novel phase interleaving strategy and dynamic phase shedding for efficiency improvement at different loads. Adjustable control of output voltage slew rate and adaptive voltage positioning are natively supported. In addition, the device supports the PMBus communication interface for reporting the telemetry of voltage, current, power, temperature, and fault conditions to the host system. All programmable parameters can be configured through the PMBus interface and can be stored in NVM as the new default values, to minimize the external component count.

The TPS53689 device is offered in a thermally enhanced 40-pin QFN packaged and is rated to operate from –40°C to 125°C.

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* Data sheet TPS53689 Dual-channel (N + M ≤ 8 phase) D-CAP+™, Step-down, Multiphase Controller with PMBus and VR14 SVID Interfaces datasheet PDF | HTML 2021年 6月 3日

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