TSB82AF15-EP
- PCI Express™ based 1394b Open Host Controller Interface (OHCI) link layer controller
- TQFP package simplifies board routing and eases board inspection
- Stand-alone link layer controller provides flexibility to interface with a 1394b s400 or a 1394b s800 physical layer controller
- Fully compliant with 1394 OHCI specification, revision 1.1 and revision 1.2 draft
- Compliant with PCI Express™ (PCIe) base specification, revision 1.1. See Section 11.1
- Fully supports provisions of IEEE Std P1394b-2002, IEEE Std 1394-1995 and IEEE Std 1394a-2000
- EEPROM configuration support to load Global Unique ID for 1394 fabric
- Utilizes 100-MHz differential PCI Express™ common reference clock
- Support for D1, D2, D3hot
- Active-state link power management saves power when packet activity on the PCI Express™ link is idle, using both L0s and L1 states
- Eight 3.3-V multifunction General-Purpose I/O (GPIO) terminals
- Supports defense, aerospace, and medical applications:
- Controlled baseline
- One assembly/test site and one fabrication site
- Extended product life cycle and product-change notification
The Texas Instruments TSB82AF15-EP is a single-function PCI Express™ (PCIe) to PCI local bus translation bridge, where the PCI bus interface is internally connected to a 1394b open host controller/link-layer controller. When the TSB82AF15-EP is properly configured, this solution provides full PCIe to 1394 link layer controller.
The TSB82AF15-EP simultaneously supports up to four posted write transactions, four nonposted transactions, and four completion transactions pending in each direction at any time. Each posted write data queue and completion data queue can store up to 8K bytes of data. The non-posted data queues can store up to 128 bytes of data.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 日期 |
|---|---|---|---|---|
| * | Data sheet | Enhanced product PCI Express™-based IEEE 1394b OHCI host controller datasheet | 2018年 1月 26日 |
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