ADC34J24EVM

ADC34J24 Quad-Channel, 12-Bit, 125-MSPS Analog-to-Digital Converter Evaluation Module

ADC34J24EVM

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Overview

The ADC34J24EVM Evaluation Module demonstrates the performance of a low power quad 125Msps 12 bit ADC. It includes the ADC34J24 device, JESD204B clocking is provided by the LMK04828 and TI voltage regulators to provide the necessary voltages. The input for the ADC is by default connected to the transformer input which can be connected to a 50 ohm single ended signal source. The clock reference input is provided via a transformer input and can be connected to a 50 ohm single ended clock source. An onboard LMK04828 can be used to generate the necessary JESD204B clocks. Register access is provided through the on board USB connection and a GUI.

Features
  • Single 1.8V supply to simplify power requirements
  • Flexible input clock buffer with 1/2/4 divider to simplify clocking
  • On chip dither to improve SFDR
  • JESD204B data interface to simplify digital interface, compliant up to 3.2Gbps lane rates
  • Supports subclasses 0, 1, 2 for synchronization and compatibility
  • Pin compatibility with 12/14b and dual/quad devices
High-speed ADCs (≥10 MSPS)
ADC34J24 Quad-Channel, 12-Bit, 125-MSPS Analog-to-Digital Converter (ADC)
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Get started

  1. Order the evaluation board - ADC34J24EVM
  2. Order (if needed) the FPGA capture card - TSW14J57EVM
  3. Read the evaluation board user's guide
  4. Make sure you have or buy the necessary power supplies for both boards
  5. Download and install the GUI for the evaluation board
  6. Download and install HSDCPro software for the TSW14J57EVM capture card

Order & start development

Evaluation board

ADC34J24EVM — ADC34J24 Quad-Channel, 12-Bit, 125-MSPS Analog-to-Digital Converter Evaluation Module

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GUI for evaluation module (EVM)

SLAC667 — ADC3xxx GUI Installer

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SLAC667 ADC3xxx GUI Installer

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Latest version
Version: 01.00.00.0D
Release date: 18 Apr 2022
lock ADC3xxx GUI Installer (zip)  — 220656 K

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Products
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Hardware development
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Release Infomation

The design resource accessed as www.ti.com/lit/zip/slac667 or www.ti.com/lit/xx/slac667d/slac667d.zip has been migrated to a new user experience at www.ti.com/tool/download/SLAC667. Please update any bookmarks accordingly.
TI's Standard Terms and Conditions for Evaluation Items apply.

Design files

Technical documentation

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Type Title Date
Certificate ADC34J24EVM EU Declaration of Conformity (DoC) 02 Jan 2019
EVM User's guide ADC3xxxEVM and ADC3xJxxEVM User's Guide (Rev. D) 24 Aug 2018

Related design resources

Hardware development

EVALUATION BOARD
TSW14J50EVM Data capture/pattern generator: data converter EVM with 8 JESD204B lanes from 0.6-6.5Gbps TSW14J57EVM Data capture/pattern generator: data converter EVM with 16 JESD204B lanes from 1.6-15Gbps

Software development

SUPPORT SOFTWARE
DATACONVERTERPRO-SW High-speed data converter pro software

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