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Product details

Parameters

Sample rate (Max) (MSPS) 125 Resolution (Bits) 14 Number of input channels 2 Interface Serial LVDS Analog input BW (MHz) 540 Features Low Power Rating Catalog Input range (Vp-p) 2 Power consumption (Typ) (mW) 232 Architecture Pipeline SNR (dB) 73.3 ENOB (Bits) 11.8 SFDR (dB) 94 Operating temperature range (C) -40 to 85 Input buffer No open-in-new Find other High-speed ADCs (>10MSPS)

Package | Pins | Size

VQFN (RGZ) 48 49 mm² 7 x 7 open-in-new Find other High-speed ADCs (>10MSPS)

Features

  • Dual Channel
  • 14-Bit Resolution
  • Single Supply: 1.8 V
  • Serial LVDS Interface (SLVDS)
  • Flexible Input Clock Buffer with Divide-by-1, -2, -4
  • SNR = 72.4 dBFS, SFDR = 87 dBc at
    fIN = 70 MHz
  • Ultra-Low Power Consumption:
    • 116 mW/Ch at 125 MSPS
  • Channel Isolation: 105 dB
  • Internal Dither and Chopper
  • Support for Multi-Chip Synchronization
  • Pin-to-Pin Compatible with 12-Bit Version
  • Package: VQFN-48 (7 mm × 7 mm)
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Description

The ADC324x are a high-linearity, ultra-low power, dual-channel, 14-bit, 25-MSPS to 125-MSPS, analog-to-digital converter (ADC) family. The devices are designed specifically to support demanding, high input frequency signals with large dynamic range requirements. An input clock divider allows more flexibility for system clock architecture design and the SYSREF input enables complete system synchronization. The ADC324x family supports serial low-voltage differential signaling (LVDS) in order to reduce the number of interface lines, thus allowing for high system integration density. The serial LVDS interface is two-wire, where each ADC data are serialized and output over two LVDS pairs. An internal phase-locked loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock that is used to serialize the 14-bit output data from each channel. In addition to the serial data streams, the frame and bit clocks are also transmitted as LVDS outputs.

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Technical documentation

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No results found. Please clear your search and try again. View all 3
Type Title Date
* Datasheet ADC324x Dual-Channel, 14-Bit, 25-MSPS to 125-MSPS, Analog-to-Digital Converters datasheet (Rev. C) Mar. 22, 2016
User guides ADC3xxxEVM and ADC3xJxxEVM User's Guide (Rev. D) Aug. 24, 2018
Technical articles It’s time for an upgrade: CMOS ADC with chopper Nov. 09, 2015

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
Description

The ADC3244 evaluation module (EVM) demonstrates the performance of the ADC3244, which is a low-power, dual-channel, 14-bit, 125-MSPS analog-to-digital converter (ADC). The board includes the ADC3244 device and TI voltage regulators to provide the necessary voltages.

The input for the ADC is connected to (...)

Features
  • Single 1.8-V supply simplifies power requirements
  • Serial LVDS interface simplifies digital interface and layout requirements
  • On-chip dither to improve SFDR; On-chip chopper to improve 1/f noise
  • Input clock buffer with 1/2/4 divider to simplify clocking
  • Pin compatibility between 12-bit and 14-bit (...)

Design tools & simulation

SIMULATION MODELS Download
SLAM241.ZIP (31 KB) - IBIS Model

Reference designs

REFERENCE DESIGNS Download
LIDAR-Pulsed Time-of-Flight Reference Design Using High-Speed Data Converters
TIDA-01187 — Time-of-flight (ToF) optical methods for measuring distance with high precision are utilized in a variety of applications, such as laser safety scanners, range finders, drones, and guidance systems. This design details the advantages of a high-speed data-converter-based solution, including target (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
VQFN (RGZ) 48 View options

Ordering & quality

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