LMK03328EVM
LMK03328EVM Ultra-Low-Jitter Clock Generator EVM With 2 PLLs, 8 Differential Outputs, and 2 Inputs
LMK03328EVM
Overview
The LMK03328EVM evaluation module provides a complete clocking platform to evaluate the 100-fs RMS jitter performance and pin-/software-configuration modes and features of the Texas Instruments LMK03328 Ultra-Low-Jitter Clock Generator with Dual PLLs, 8 outputs, 2 inputs, and integrated EEPROM.
The LMK03328EVM can be used as a flexible, multiple-output clock source for compliance testing, performance evaluation, and initial system prototyping. The edge-launch SMA ports provide access to the LMK03328 clock inputs and outputs for interfacing to test equipment and reference boards using commercially available coaxial cables, adapters, or baluns (not included). This connectivity enables integrated system level testing between TI’s LMK03328 and third-party FPGA/ASIC/SoC reference boards. A software graphical user interface (GUI) platform can be installed on a Host PC to access the LMK03328 device registers and EEPROM via the on-board USB-to-I2C interface. The GUI platform can also be used to export / import Register and EEPROM data files to facilitate factory or in-system programming of custom device configurations.
Features
- Two independent clock domains in Dual PLL operation for clocking multiple interface standards/protocols
- Up to 8 pairs of Differential or 16 LVCMOS (1.8V) clock outputs, or any combination of both
- Flexible device pin modes offer multiple start-up register configurations (jumper selectable)
- Clock frequency margining: ±50 ppm adjustment of output frequencies via on-board pullable crystal
- GUI platform for full access to LMK03328 registers and EEPROM
- LMK03328EVM
- 3-ft. USB cable, Q362-ND
Clock generators
Current sense amplifiers analog output
Linear regulators (LDO)
Order & start development
LMK03328EVM – LMK03328EVM Ultra-Low-Jitter Clock Generator EVM with 2 PLLs, 8 Differential Outputs, and 2 Inputs
Technical documentation
| Type | Title | Date | |
|---|---|---|---|
| * | User guide | LMK03328EVM User's Guide | Aug. 25, 2015 |
| More literature | LMK03328EVM EU Declaration of Conformity (DoC) | Jan. 02, 2019 | |
| Datasheet | LMK03328 Ultra-Low Jitter Clock Generator With Two Independent PLLs, Eight Outputs, Integrated EEPROM datasheet (Rev. D) | Apr. 20, 2018 | |
| Application note | Clocking High Speed Serial Links with LMK033X8 (Rev. A) | Jan. 07, 2016 | |
| Application note | Frequency Margining Using TI High-Performance Clock Generators (Rev. A) | Dec. 12, 2015 | |
| Technical articles | How to select an optimal clocking solution for your FPGA-based design | Dec. 09, 2015 | |
| User guide | LMK03328EVM CodeLoader Software User's Guide | Aug. 25, 2015 | |
| User guide | CodeLoader 4 Operating Instructions User's Guide (Rev. A) | Jul. 21, 2014 |
Related design resources
Hardware development
EVALUATION BOARD
Software development
APPLICATION SOFTWARE & FRAMEWORK
Support & training
TI E2E™ forums with technical support from TI engineers
Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.
If you have questions about quality, packaging or ordering TI products, see TI support.