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Product details

Parameters

Output options Adjustable Output, Fixed Output Iout (Max) (A) 1 Vin (Max) (V) 6.5 Vin (Min) (V) 2.2 Vout (Max) (V) 6 Vout (Min) (V) 0.8 Fixed output options (V) 1.2, 1.8, 3.3, 5 Noise (uVrms) 50 Iq (Typ) (mA) 0.06 Thermal resistance θJA (°C/W) 48 Load capacitance (Min) (µF) 4.7 Rating Catalog Regulated outputs (#) 1 Features Enable Accuracy (%) 3 PSRR @ 100 KHz (dB) 57 Dropout voltage (Vdo) (Typ) (mV) 170 Operating temperature range (C) -40 to 125 open-in-new Find other Linear regulators (LDO)

Package | Pins | Size

VSON (DRB) 8 9 mm² 3 x 3 open-in-new Find other Linear regulators (LDO)

Features

  • Low-Dropout 1-A Regulator With Enable
  • Adjustable Output Voltages: 0.8 V to 6 V
  • Fixed Output Voltages: 0.8 V to 6 V
  • Wide-Bandwidth High PSRR:
    • 63 dB at 1 kHz
    • 57 dB at 100 kHz
    • 38 dB at 1 MHz
  • Low Noise: (14 × VOUT ) µVRMS Typical (100 Hz to 100 kHz)
  • Stable with a 4.7-µF Ceramic Capacitor
  • Excellent Load/Line Transient Response
  • 3% Overall Accuracy (Over Load/Line/Temp)
  • Overcurrent and Overtemperature Protection
  • Very Low Dropout: 170 mV Typical at 1 A
  • 3-mm × 3-mm VSON-8 DRB Package

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Description

The TPS7A80 family of low-dropout linear regulators (LDOs) offer very high power-supply ripple rejection (PSRR) at the output. This LDO family uses an advanced BiCMOS process and a PMOSFET pass device to achieve very low noise, excellent transient response, and excellent PSRR performance.

The TPS7A80 family is stable with a 4.7-µF ceramic output capacitor, and uses a precision voltage reference and feedback loop to achieve a worst-case accuracy of 3% over all load, line, process, and temperature variations.

This family is fully specified over the temperature range of TJ = –40°C to +125°C, and is offered in a 3-mm × 3-mm, VSON-8 package with a thermal pad.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 11
Type Title Date
* Datasheet TPS7A80 Low-Noise, Wide-Bandwidth, High PSRR, Low-Dropout 1-A Linear Regulator datasheet (Rev. J) Jan. 18, 2018
Application notes A Topical Index of TI LDO Application Notes (Rev. F) Jun. 27, 2019
Technical articles LDO basics: capacitor vs. capacitance Aug. 01, 2018
Technical articles LDO Basics: Preventing reverse current Jul. 25, 2018
Technical articles LDO basics: introduction to quiescent current Jun. 20, 2018
Selection guides Low Dropout Regulators Quick Reference Guide (Rev. P) Mar. 21, 2018
Technical articles LDO basics: noise – part 1 Jun. 14, 2017
User guides Universal Low-Dropout (LDO) Linear Voltage Regulator EVM User's Guide Oct. 12, 2016
User guides TSW2200 Multi-Output Power Supply Board (Rev. A) Dec. 13, 2012
Application notes LDO Performance Near Dropout Oct. 08, 2010
User guides TPS7A80xxDRBEVM User's Guide Jul. 14, 2010

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
299
Description

The LMK03318EVM evaluation module provides a complete clocking platform to evaluate the 100-fs RMS jitter performance and pin-/software-configuration modes and features of the Texas Instruments LMK03318 Ultra-Low-Jitter Clock Generator with 1 PLL, 8 outputs, 2 inputs, and integrated EEPROM.

The (...)

Features
  • High-performance PLL with 6 output dividers for clocking multiple interface standards/protocols
  • Up to 8 pairs of Differential or 16 LVCMOS (1.8V) clock outputs, or any combination of both
  • Flexible device pin modes offer multiple start-up register configurations (jumper selectable)
  • Clock frequency (...)
EVALUATION BOARDS Download
document-generic User guide
299
Description

The LMK03328EVM evaluation module provides a complete clocking platform to evaluate the 100-fs RMS jitter performance and pin-/software-configuration modes and features of the Texas Instruments LMK03328 Ultra-Low-Jitter Clock Generator with Dual PLLs, 8 outputs, 2 inputs, and integrated EEPROM.

The (...)

Features
  • Two independent clock domains in Dual PLL operation for clocking multiple interface standards/protocols
  • Up to 8 pairs of Differential or 16 LVCMOS (1.8V) clock outputs, or any combination of both
  • Flexible device pin modes offer multiple start-up register configurations (jumper selectable)
  • Clock (...)
EVALUATION BOARDS Download
document-generic User guide
20
Description
The TPS7A8001DRBEVM is a fully assembled and tested circuit for evaluating the TPS7A8001 Low-Noise, High-Bandwidth PSRR, Low-Dropout 1A Linear Regulator in the DRB (3mm x 3mm SON-8) package.
Features
  • Stable with Ceramic Output Capacitor
  • Fast Start-Up Time (50μs)
  • 2% Accuracy Over Load/Line/Temp
  • Low Output Noise/Ultra High PSRR
  • 49mVRMS Output Noise, 100Hz to 100KHz
  • 63dB@1kHz - 57dB@100kHz - 38dB@1MHz
  • Factory EEPROM programmable VOUT
  • 3 x 3mm SON-8 Package

Design tools & simulation

SIMULATION MODELS Download
SBVM298A.ZIP (23 KB) - PSpice Model
SIMULATION MODELS Download
SBVM880.ZIP (1 KB) - PSpice Model
SIMULATION MODELS Download
SBVM883.ZIP (40 KB) - PSpice Model
SIMULATION MODELS Download
SBVM884.ZIP (40 KB) - PSpice Model
SIMULATION MODELS Download
SBVM885.ZIP (2 KB) - PSpice Model
SIMULATION MODELS Download
SBVM886.ZIP (2 KB) - PSpice Model
SIMULATION MODELS Download
SBVM887.ZIP (2 KB) - PSpice Model
SIMULATION MODELS Download
SBVM888.ZIP (2 KB) - PSpice Model
SIMULATION MODELS Download
SBVM889.ZIP (40 KB) - PSpice Model
SIMULATION MODELS Download
SBVM890.ZIP (40 KB) - PSpice Model

Reference designs

REFERENCE DESIGNS Download
High efficiency power supply architecture reference design for protection relay processor module
TIDA-010011 — This reference design showcases various power architectures for generating multiple voltage rails for an application processor module, requiring >1A load current and high efficiency . The required power supply is generated using 5-, 12- or 24-V DC input from the backplane. Power supplies are (...)
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High Power Density 9 to 15V In Intel Atom C2000 SoC VCCP & VNN Rail for Microservers Ref Design
TIDA-00507 The TI TPS53625 VR12 reference design (TIDA-00507), supporting Intel® Atom™ C2000, uses TI's driverless PWM architecture with TI power stages for high power density, high efficiency, and low component count while meeting Intel voltage tolerance requirements with low ripple and high (...)
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REFERENCE DESIGNS Download
Quad-Channel 250-Msps Digitizer with Variable Gain Amplifier Reference Design
TIDA-00094 This reference design shows a quad channel, 14-bit, 250-Msps digitizer with wide input range using the LMH6881 programmable differential amplifier and ADS4449 quad-channel, 14-bit, 250-Msps ADC. This combination allows an input voltage range of approximately 1 Vpp to 100 uVpp (4 dBm to -75 dBm (...)
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REFERENCE DESIGNS Download
Optimizing THS4509 to Drive High Speed ADCs Reference Design
TIDA-00093 This reference design shows the ability of the high-speed amplifier, THS4509 to perform single-ended to differential conversion to drive high-speed analog-to-digital converters (ADCs) while maintaining excellent noise and distortion performance. Performance versus input frequency is shown for both (...)
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REFERENCE DESIGNS Download
Adjacent Channel Power Ratio (ACPR) and Error Vector Magnitude (%EVM) Measurements
TIDA-00076 This reference design discusses the use of the TSW3085EVM with the TSW3100 pattern generator to test adjacent channel power ratio (ACPR) and error vector magnitude (EVM) measurements of LTE baseband signals. By using the TSW3100 LTE GUI, patterns are loaded into the TSW3085EVM which is comprised of (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
Optimizing LMH6554 to Drive High Speed ADCs
TIDA-00092 This reference design shows the ability of the high-speed amplifier, LMH6554, to perform single-ended to differential conversion to drive high-speed analog-to-digital converters (ADCs) while maintaining excellent noise and distortion performance. Performance versus input frequency is shown for both (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
Wideband RF-to-Digital Complex Receiver-Feedback Signal Chain
TIDA-00074 This is a wideband complex-receiver reference design and evaluation platform that is ideally suited for use as a feedback receiver for transmitter digital predistortion. The EVM signal chain is ideal for high intermediate-frequency (IF) complex-feedback applications and contains a complex (...)
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REFERENCE DESIGNS Download
Basestation Transceiver with DPD Feedback Path
TIDA-00068 The design is for a small cell base station development platform.  It provides two real receive paths, two complex transmit paths, and a shared real feedback path.  This design has macro basestation performance, but with small cell base station footprint.  The current design handles (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
SON (DRB) 8 View options

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