Interface to a 5-V BiSS position encoder reference design
TIDA-00175
This product has been released to the market and is available for purchase. For some products, newer alternatives may be available.
See the Important Notice and Disclaimer covering reference designs and other TI resources.
Key Document
- Interface to a 5-V BiSS Position Encoder (TIDA-00175)
(PDF 14782 KB)
20 Jun 2014
Description
This TI Design implements a hardware interface solution based on the BiSS standard for position or rotary encoders. It supports both BiSS Point-to-Point and BiSS Bus configurations.The building blocks include the power supply for a 5V BiSS encoder – with innovative smart e-Fuse technology - and robust full-duplex RS485 transceivers, including line termination and EMC protection. An auxiliary power supply and logic level interface with adjustable I/O voltage level is provided to connect to subsequent MCUs and MPUs that would run the BiSS (or SSI) Master protocol stack. This design is fully tested to meet EMC immunity requirements for ESD, Fast Transient Burst and Surge according to IEC61800-3.
Features
- 3.3V RS-485 full-duplex transceivers with IEC-ESD meets BiSS clock frequency (10Mhz)
- Design meets EMC immunity requirements for ESD, Fast Transient Burst and Surge according to IEC61800-3
- Wide input (15-30VDC) high-efficiency (>85%) DCDC power supply for 5V BiSS (or SSI) encoders with 350mA, lowest-ripple (<20mVpp) output
- Protected power supply with innovative eFuse technology with inrush current limitation and protection against over-current, over- and under-voltage and disconnect in case of fault.
- Option to shut down encoder power supply in case of fault or to save power when no encoder is connected.
- 3.3V interface with level shifter to also support 2.5V or 1.8V I/O interface to processors to run the BiSS (or SSI) Master
See the Important Notice and Disclaimer covering reference designs and other TI resources.