TIDEP0033

SPI Master with Signal Path Delay Compensation Reference Design

TIDEP0033

Design files

Overview

The Programmable Real-time Unit within the Industrial Communication Subsystem (PRU-ICSS) enables you to support real-time critical applications without using FPGAs, CPLDs or ASICs.
This reference design describes the implementation of the SPI master protocol with signal path delay compensation on PRU-ICSS. It supports the 32-bit communication protocol of ADS8688 with a SPI clock frequency of up to 16.7 MHz.

Features
  • SPI master protocol with adjustable signal path delay compensation (not requiring external hardware for signal path delay compensation)
  • Up to 16.7-MHz SPI clock
  • Supports ADS8688 SPI-communication protocol
  • Automatic measurement of signal path delay for known secondary response
  • This PRU-ICSS firmware has been validated with TIDA-00164 (ADS8688 and ISO7141CC) and contains firmware source code, implementation description and getting started instructions.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

TIDUA38A.PDF (1141 K)

Reference design overview and verified performance test data

TIDRF78.PDF (248 K)

Detailed schematic diagram for design layout and components

TIDRF79.PDF (124 K)

Complete listing of design components, reference designators, and manufacturers/part numbers

TIDRF80.ZIP (447 K)

Detailed overview of design layout for component placement

TIDRF82.ZIP (384 K)

Files used for 3D models or 2D drawings of IC components

TIDCAG2.ZIP (5563 K)

Design file that contains information on physical board layer of design PCB

TIDRF81.ZIP (447 K)

PCB layer plot file used for generating PCB design layout

Products

Includes TI products in the design and potential alternatives.

AND gates

SN74AUP2G082-ch, 2-input, 0.8-V to 3.6-V low power AND gates

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AND gates

SN74LVC1G08Single 2-input, 1.65-V to 5.5-V AND gate

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Arm-based processors

AM4379Sitara processor: Arm Cortex-A9, PRU-ICSS, EtherCAT, 3D graphics

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Automotive LED drivers

TPIC28108-bit LED driver with I2C interface

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Digital isolators

ISO7141CCQuad-channel, 3/1, 50-Mbps digital isolator

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Isolated CAN transceivers

ISO1050Isolated 5-V CAN transceiver

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Linear & low-dropout (LDO) regulators

TPS717150-mA, high-PSRR, low-IQ, low-dropout voltage regulator with enable

Data sheet document-pdfAcrobat PDF open-in-new HTML
Linear & low-dropout (LDO) regulators

TPS766250-mA, 10-V, low-IQ, low-dropout voltage regulator with power good & enable

Data sheet document-pdfAcrobat PDF
Multi-channel ICs (PMIC)

TPS65910Integrated Power Management IC (PMIC) w/ 4 DC/DCs, 8 LDOs and RTC in 6x6mm QFN family

Data sheet document-pdfAcrobat PDF open-in-new HTML
Multi-switch detection interface (MSDI) ICs

SN65HVS88234-V, 8-channel digital-input serializer for industrial automation & process control

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Precision ADCs (<=10MSPS)

ADS868816-bit, 500-kSPS, 8-channel, single-supply SAR ADC with bipolar input ranges

Data sheet document-pdfAcrobat PDF open-in-new HTML

Start development

Technical documentation

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Type Title Date
* Design guide SPI Master With Signal Path Delay Compensation on PRU-ICSS Design Guide (Rev. A) Jul. 13, 2015
More literature SPI Master With Signal Path Delay Compensation on PRU-ICSS Firmware Jun. 15, 2015

Related design resources

Hardware development

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TMDSIDK437X AM437x/AMIC120 Industrial Development Kit (IDK)

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