Generating AVS SmartReflex Core Voltage for K2E Using TPS544C25 and PMBus Reference Design
TIDEP0042
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This product has been released to the market and is available for purchase. For some products, newer alternatives may be available.
See the Important Notice and Disclaimer covering reference designs and other TI resources.
Key Document
- Generating AVS SmartReflex Core Voltage for K2E SOC Design Guide
(PDF 3714 KB)
18 Aug 2015
Description
The K2E requires the use of AVS SmartReflex control for the CVDD core voltage. This design provides method of generating the proper voltage using software and the PMBus interface of the TPS544C25. The circuit can be implemented on the XEVMK2EX.
Features
- Provides the AVS SmartReflex Core voltage required by the K2E
- Meets the 5% voltage requirement for CVDD
- Uses the PMBus interface on the TPS544C25 for control
- Uses software to send the VOUT command
- Complete system reference with schematics, BOM, design files, and HW Design Guide, implemented on the K2E EVM platform for testing and evaluation
See the Important Notice and Disclaimer covering reference designs and other TI resources.
