Generating AVS SmartReflex Core Voltage for K2E Using TPS544C25 and PMBus Reference Design


Design files


The K2E requires the use of AVS SmartReflex control for the CVDD core voltage. This design provides method of generating the proper voltage using software and the PMBus interface of the TPS544C25. The circuit can be implemented on the XEVMK2EX.

  • Provides the AVS SmartReflex Core voltage required by the K2E
  • Meets the 5% voltage requirement for CVDD
  • Uses the PMBus interface on the TPS544C25 for control
  • Uses software to send the VOUT command
  • Complete system reference with schematics, BOM, design files, and HW Design Guide, implemented on the K2E EVM platform for testing and evaluation

A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

TIDUAG0.PDF (3714 K)

Reference design overview and verified performance test data


Detailed schematic diagram for design layout and components


Complete listing of design components, reference designators, and manufacturers/part numbers

TIDC685.ZIP (26925 K)

Design file that contains information on physical board layer of design PCB

TIDRB27.ZIP (7495 K)

PCB layer plot file used for generating PCB design layout


Includes TI products in the design and potential alternatives.

Arm-based processors

66AK2E05High performance multicore DSP+Arm - 4x Arm A15 cores, 1x C66x DSP core, NetCP, 10GbE

Data sheet: PDF
Arm-based processors

AM5K2E02Sitara processor: dual-Arm Cortex-A15

Data sheet: PDF
Arm-based processors

AM5K2E04Sitara processor: quad-Arm Cortex-A15

Data sheet: PDF
Buck converters (integrated switch)

TPS544C254.5-V to 18-V, 30-A synchronous SWIFT™ buck converter with PMBus and frequency sync

Data sheet: PDF | HTML
I2C level shifters, buffers & hubs

PCA93062-bit bidirectional 400-kHz I2C/SMBus voltage level translator

Data sheet: PDF | HTML

Technical documentation

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Type Title Date
* Design guide Generating AVS SmartReflex Core Voltage for K2E SOC Design Guide Aug. 18, 2015

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