4.5-V to 18-V, 30-A synchronous SWIFT™ buck converter with PMBus and frequency sync
Product details
Parameters
Package | Pins | Size
Features
- PMBus 1.2 Compliant Converters: 20 A and 30 A
- Input Voltage Range: 4.5 V to 18 V
- Output Voltage Range: 0.5 V to 5.5 V
- 5 mm × 7 mm LQFN Package
- Single Thermal Pad
- Integrated 5.5-mΩ and 2.0-mΩ Stacked NexFET™ Power Stage
- 500-mV to 1500-mV Reference for Adapative Voltage Scaling (AVS) and Margining through PMBus
- 0.5% Reference Accuracy at 600 mV and Above
- Lossless Low-Side MOSFET Current Sensing
- Voltage Mode Control with Input Feed-Forward
- Differential Remote Sensing
- Monotonic Start-Up into Pre-Biased Output
- Output Voltage and Output Current Reporting
- External Temperature Monitoring with 2N3904 Transistor
- Programmable via the PMBus interface
- VOUT_COMMAND and AVS VOUT Transition Rate
- Overcurrent Protection with Thermal Compensation
- UVLO, Soft-Start and Soft-Stop
- PGOOD, OV, UV, OT Levels
- Fault Responses
- Turn-On and Turn-Off Delays
- Thermal Shutdown
- Pin Strapping for Switching Frequency: 200 kHz to 1 MHz
- Frequency Synchronization to an External Clock
- Footprint Compatible 20-A, 30-A Converters
Description
The TPS544x25 devices are PMBus 1.2 Compliant, non-isolated DC-DC converters with integrated FETs, capable of high-frequency operation and 20-A or 30-A current output from a 5 mm × 7 mm package. High-frequency, low-loss switching, provided by an integrated NexFET™ power stage and optimized drivers, allows for very high-density power solutions. The PMBus interface enables the AVS through VOUT_COMMAND, flexible converter configuration, as well as key parameters monitoring including output voltage, current and an optional external temperature. Response to fault conditions can be set to either restart, latch-off or ignore depending on system requirements.
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Technical documentation
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View all 10 Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
TPS544C25EVM-681
Description
The TPS544C25EVM-681 evaluation module (EVM) is designed as a single output DC-DC converter that demonstrates a typical low-voltage application while providing a number of test points to evaluate the performance. It uses a nominal 12-V input bus to produce a regulated 0.95-V output at up to (...)
Features
- Regulated 0.95-V output up to 30-ADC, steady-state output current
- Configurable features via the PMBus interface include Output Voltage, UVLO, Soft Start, Enable, Fault Limits and Programmable Response
- Convenient Test Points for Probing Critical Waveforms
- Optional External Temperature Sensor
Software development
PMBUSSW-LINUX — The Linux driver supports PMBus controlled Buck Controllers. The Linux driver supports communication through the PMBus and interfaces with the HWMon framework.
Linux Mainline Status
Available in Linux Main line: Yes
Available through git.ti.com: N/A
Supported Devices:
- tps40400
- tps40422
- tps544b20
- tps544b25
- (...)
Design tools & simulation
SLUM462.ZIP (109 KB) - PSpice Model
SLUM467A.ZIP (158 KB) - PSpice Model
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
Reference designs
PMP12004-HE — This design for powering Xilinx Zynq UltraScale+ (www.xilinx.com/power) Remote Radio Heads (RRH) features the TPS6508640 and is a small and highly efficient solution. The PMIC reduces size, cost, and power loss by having integrated rails into 1 device, high switching frequency and separate rails for (...)
Design files
-
download PMP12004-HE BOM.pdf (93KB) -
download PMP12004-HE Assembly Drawing.pdf (470KB) -
download PMP12004-HE PCB.pdf (5646KB) -
download PMP12004-HE CAD Files.zip (2086KB) -
download PMP12004-HE Gerber.zip (1407KB)
PMP20023 — Fixed frequency voltage mode control is used for communications and computing applications where a predictable frequency and / or synchronization to an external clock is needed. With control and power in one IC and inductor on top of the IC with its raised leads, a very small size solution is (...)
Design files
PMP11399 — PMP11399 is a complete PMBus power system for 3 ASIC/FPGA cores, DDR3 core memory, VTT termination, and auxiliary voltages commonly found on high-performance Ethernet Switches. The hardware is accompanied by a GUI that allows the user to perform real-time configuration and monitoring of the power (...)
Design files
-
download PMP11399 BOM .pdf (287KB) -
download PMP11399 Assembly Drawing .pdf (531KB) -
download PMP11399 CAD Files.zip (9337KB)
PMP11328 — The PMP11328 is a high power density 30A PMBus power supply meeting the Xilinx Ultrascale+ ZU9EG FPGA core rail power specifications for Base Station Remote Radio Unit (RRU) applications. The power supply regulates 0.85V for the core rail at 25A in 55mm x 40mm total power supply PCB area. PMBus (...)
Design files
-
download PMP11328 BOM.pdf (109KB) -
download PMP11328 Assembly Drawing.pdf (97KB) -
download PMP11328 PCB.pdf (536KB) -
download PMP11328 Gerber.zip (437KB)
TIDEP0042 — The K2E requires the use of AVS SmartReflex control for the CVDD core voltage. This design provides method of generating the proper voltage using software and the PMBus interface of the TPS544C25. The circuit can be implemented on the XEVMK2EX.
TIDEP0041 — The K2E requires the use of AVS SmartReflex control for the CVDD core voltage. This design provides method of generating the proper voltage without the need for any software. The circuit is currently implemented on the XEVMK2EX.
PMP10896 — Complete PMBus power system for 3 ASIC/FPGA cores, DDR3 core memory, and auxiliary voltages found on high-performance Ethernet Switches.
Design files
-
download PMP10896 BOM.pdf (195KB) -
download PMP10896 Assembly Drawing.pdf (896KB) -
download PMP10896 PCB.pdf (13168KB) -
download PMP10896 Gerber.zip (2171KB)
CAD/CAE symbols
| Package | Pins | Download |
|---|---|---|
| LQFN-CLIP (RVF) | 40 | View options |
Ordering & quality
Information included:
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
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