TIDEP0074

Packet Processing Engine Reference Design for IEC61850 GOOSE Forwarding

TIDEP0074

Design files

Overview

The TIDEP0074 reference design demonstrates packet switching and filtering logic implemented in the M4 core of AM572x based upon the Ethertype, MAC address and Application ID (APPID) of GOOSE packets received from the PRU-ICSS. Packets are filtered and routed to destinations in order to allow the time-critical events defined in substation communication standard IEC 61580 to be serviced in a dedicated core. The design additionally shows multi-core communication between the ARM Cortex™-A15, Cortex™-M4 and DSP C66x™ cores of the AM572x while Linux runs on the A15s and TI-RTOS runs on the M4 and DSP cores.

Features
  • Ethernet packet switching logic and IEC61850 GOOSE filtering algorithm implemented on ARM Cortex-M4 cores of AM572x to determine destination routing to A15 or further processing in M4.
  • Interprocessor Communication (IPC) using messageQ in A15 with Linux, and in M4 and DSP with TI-RTOS
  • PRU-ICSS firmware load and boot by M4 for Ethernet packet transfer
  • The TIDEP0074 reference design is tested on the TMDXIDK5728 board and includes documentation, software, demo application, and HW design files.

A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

TIDUBO1.PDF (1369 K)

Reference design overview and verified performance test data

TIDRLH4.ZIP (1453 K)

Detailed schematic diagram for design layout and components

TIDRLH5.ZIP (31 K)

Complete listing of design components, reference designators, and manufacturers/part numbers

TIDRLH6.ZIP (606 K)

Detailed overview of design layout for component placement

TIDRLH7A.PDF (6325 K)

Files used for 3D models or 2D drawings of IC components

TIDRLH7.ZIP (19060 K)

Files used for 3D models or 2D drawings of IC components

TIDCC42A.ZIP (1495 K)

Design file that contains information on physical board layer of design PCB

TIDCC42.ZIP (10113 K)

Design file that contains information on physical board layer of design PCB

Products

Includes TI products in the design and potential alternatives.

Arm-based processors

AM5716Sitara processor: Arm Cortex-A15 & DSP

Data sheet document-pdfAcrobat PDF open-in-new HTML
Arm-based processors

AM5718Sitara processor: Arm Cortex-A15 & DSP, multimedia

Data sheet document-pdfAcrobat PDF open-in-new HTML
Arm-based processors

AM5726Sitara processor: dual Arm Cortex-A15 & dual DSP

Data sheet document-pdfAcrobat PDF open-in-new HTML
Arm-based processors

AM5728Sitara processor: dual Arm Cortex-A15 & dual DSP, multimedia

Data sheet document-pdfAcrobat PDF open-in-new HTML
Clock generators

CDCE913Programmable 1-PLL VCXO clock synthesizer with 2.5-V or 3.3-V LVCMOS outputs

Data sheet document-pdfAcrobat PDF open-in-new HTML
Ethernet PHYs

TLK105LIndustrial temperature, single port 10/100-Mbps Ethernet physical layer

Data sheet document-pdfAcrobat PDF open-in-new HTML
Multi-channel ICs (PMICs)

TPS659037Power Management IC (PMIC) for ARM Cortex A15 Processors

Data sheet document-pdfAcrobat PDF open-in-new HTML
Noninverting buffers & drivers

SN74LVC1G07Single 1.65-V to 5.5-V buffer with open-drain outputs

Data sheet document-pdfAcrobat PDF open-in-new HTML
RS-485 & RS-422 transceivers

SN65HVD783.3 V Half-Duplex RS-485, with IEC ESD, 50 Mbps

Data sheet document-pdfAcrobat PDF open-in-new HTML

Technical documentation

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* Design guide Packet Processing Engine for IEC61850 GOOSE Forwarding Design Guide Apr. 01, 2016

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