TIDEP0034
連接至寬頻 ADC 和 DAC 且具有 JESD204B 的 66AK2L06 DSP+ARM 處理器
TIDEP0034
概覽
For developers currently using an FPGA or ASIC to connect to high speed data converters who need faster time to market with increased performance and significant reduction in cost, power, and size this reference design includes the first widely available processor integrating a JESD204B interface and Digital Front End (DFE) processing. Connecting to the ADC12J4000 and DAC38J84 provides an efficient solution for Test & Measurement and Defense applications.
特點
- Easy integration of signal processor to data converters over JESD204B
- Multichannel sampling rates up to 368Msps with 150MHz of processing bandwidth
- Also available: DFE Signal Processing Bypass mode configuration from Azcom Technology (Ecosystem partner). Please request it here.
- DFE processing for filtering, down-sampling or up-sampling
- FFT/iFFT processing using FFTC accelerator
- System optimized for Test & Measurement and Defense applications
- Wideband sampling with JESD attached signal processing solution including DSP, ADC and DAC boards, demo software, configuration GUIs and Getting Started Guide
- A robust demonstration and development platform including three EVMs, a deterministic latency card, schematic, BOM, user guide, benchmarks, software and demos
已開發完全組裝的電路板,僅供測試與性能驗證,且為非賣品。
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| 類型 | 標題 | 下載最新的英文版本 | 日期 | |||
|---|---|---|---|---|---|---|
| * | 設計指南 | 66AK2L06 JESD Attach to ADC12J4000 / DAC38J84 Design Guide (Rev. A) | 2015/10/22 | |||
| 應用說明 | 66AK2L06 JESD Attach to ADC12J4000/DAC38J84 Getting Started Guide (Rev. B) | 2016/6/20 | ||||
| 白皮書 | Optimizing your test and measurement solution by leveraging the most integrated | 2015/11/3 | ||||
| 應用說明 | System solution for avionics & defense | 2015/9/23 |