SLUSDQ4 April 2019 BQ79606A-Q1
ADC measurements for the cell voltages inputs are available either on-demand (single conversion) or continuously (with optional programmed delay between conversions). The ADCs integrated into the BQ79606A-Q1 are capable of 16-bit resolution for the corrected measurement or 24-bit resolution for the uncorrected measurements. Corrected values are 16 bits and are presented in H and L registers. Uncorrected values are 24-bit and are presented in H, M, and L registers.
The measurement results require multiple registers. Reads must be done starting with the H byte register. This locks the M (when applicable) and L registers to ensure that the read values come from the same measurement and do not change mid-read. Best practice is to "burst read" all of the registers of interest. This note applies for AUX and DIE temperature ADCs as well.
The VC* inputs measure voltages of -2V to 5V (cells 2-6, VC1 to VC6 and CB pins not connected) and 0V to 5V (cell 1, VC0 to VC1). Connect unused inputs to the highest-connected cell. For example, in a 4-cells system, connect the unused VC5 and VC6 inputs to VC4. Channels are used from lowest to highest, with VC0 connected to the (–) terminal of the bottom cell. To achieve the highest accuracy over temperature, the BQ79606A-Q1 samples the die temperature whenever a VC* measurement is taken and then applies temperature correction to the ADC result to correct for any changes in the reference over temperature. Both the corrected and uncorrected values are available to be read by the host. The corrected non filtered values are in the VCELL*H (higher byte) and VCELL*L (lower byte) registers, and the lowpass filtered corrected results are contained in the VCELL*_HF (higher byte) and VCELL*_LF (lower byte). See the Single Pole Digital Filter for more details on the digital lowpass filter. The uncorrected non filtered values are in the VCELL*_HU (higher byte), VCELL*_MU (middle byte) and VCELL*_LU (lower byte) registers. The uncorrected values are available for the host to use to apply different correction coefficients. The uncorrected data also can be filtered if DIAG_CTRL4[VCFILTSEL]=1 and DIAG_CTRL4[CELUSEL]=1, the values are in the VCELL*_HU (higher byte), VCELL*_MU (middle byte) and VCELL*_LU (lower byte) registers. See Table 3 for more details.
|CELL ADC Parameter(s)||Filtered/corrected||Register(s)||Conversion (Equation)|
|VCELL1-6||Corrected and filtered||VCELL*_LF/HF||VCELL*=190.7349 uV x 2scomp|
|Corrected and non filtered||VCELL*L/H||VCELL*=190.7349 uV x 2scomp|
|Uncorrected and non filtered||VCELL*_LU/MU/HU||VCELL*=0.745 uV x 2scomp|
|Uncorrected and filtered||VCELL*_LU/MU/HU||VCELL*=0.745 uV x 2scomp|
The values returned from the ADC conversion for these channels are in 2's complement form. When converting the register value to a voltage, first the number must be converted from 2's complement to a decimal number as follows for 16-bits :
and for 24-bits
Where ai is the bit value (a15 MSB to a0 LSB) of the measurement results from the ADC. The same equations applies for CELL ADC, AUX ADC, and DIE temperature ADC.
In order to provide the host a way to diagnose a "stuck value" in the result registers, the ADC output registers are initialized to 0x8000 for 16 bit data and 0x800000 for 24 bit data value with every ADC_GO command. The 0x8000 and 0x800000 value are an impossible results to read under normal operating conditions and if read, the host easily recognizes this as an incorrect value and can act accordingly.
The host selects which measurements are to be done using the CELL_ADC_CTRL register. For the cell measurements (CELL_ADC_CTRL), enabling the channel, enables the internal level shifter to prepare for the ADC measurement. For best accuracy measurements, the host must wait at least tDLY(COM) after enabling the cell channels before requesting a measurement to ensure proper settling time. The cells do not require enabling/disabling with every measurement. It is recommended that the cells are enabled and left on while the host is actively requesting ADC samples to avoid repeated delay times.
Once the channels are selected and settled, the CONTROL2[CELL_ADC_GO] is used to start the conversions. Additionally, a time delay may be added from when the CELL_ADC_GO bits are written to when the conversion starts using the ADC_DELAY[DLY] bits. This allows the host to synchronize multiple measurements between separate devices (for example, synchronizing the cell measurements with an external current measurement).