SNVS952F December   2012  – May 2021 LM25019

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Control Overview
      2. 7.3.2  VCC Regulator
      3. 7.3.3  Regulation Comparator
      4. 7.3.4  Overvoltage Comparator
      5. 7.3.5  On-Time Generator
      6. 7.3.6  Current Limit
      7. 7.3.7  N-Channel Buck Switch and Driver
      8. 7.3.8  Synchronous Rectifier
      9. 7.3.9  Undervoltage Detector
      10. 7.3.10 Thermal Protection
      11. 7.3.11 Ripple Configuration
      12. 7.3.12 Soft Start
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 RFB1, RFB2
        2. 8.2.2.2 Frequency Selection
        3. 8.2.2.3 Inductor Selection
        4. 8.2.2.4 Output Capacitor
        5. 8.2.2.5 Type III Ripple Circuit
        6. 8.2.2.6 VCC and Bootstrap Capacitor
        7. 8.2.2.7 Input Capacitor
        8. 8.2.2.8 UVLO Resistors
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

GUID-DD5ECBA7-DBFB-4DBC-B42A-1A96ADF1142D-low.gifFigure 5-1 8-Pin SO PowerPAD DDA PackageTop View
GUID-F2402916-E713-443E-91A6-0BC1F67A28AA-low.gifFigure 5-2 8-Pin WSONNGU PackageTop View
Table 5-1 Pin Functions
PIN I/O DESCRIPTION APPLICATION INFORMATION
NO. NAME
1 RTN Ground Ground connection of the integrated circuit
2 VIN I Input Voltage Operating input range is 7.5 V to 48 V.
3 UVLO I Input Pin of Undervoltage Comparator Resistor divider from VIN to UVLO to GND programs the undervoltage detection threshold. An internal current source is enabled when UVLO is above 1.225 V to provide hysteresis. When UVLO pin is pulled below 0.66 V externally, the regulator is in shutdown mode.
4 RON I On-Time Control A resistor between this pin and VIN sets the buck switch on-time as a function of VIN. Minimum recommended on-time is 100 ns at max input voltage.
5 FB I Feedback This pin is connected to the inverting input of the internal regulation comparator. The regulation level is 1.225 V.
6 VCC O Output from the Internal High Voltage Series Pass Regulator. Regulated at 7.6 V The internal VCC regulator provides bias supply for the gate drivers and other internal circuitry. A 1.0-μF decoupling capacitor is recommended.
7 BST I Bootstrap Capacitor An external capacitor is required between the BST and SW pins (0.01-μF ceramic). The BST pin capacitor is charged by the VCC regulator through an internal diode when the SW pin is low.
8 SW O Switching Node Power switching node. Connect to the output inductor and bootstrap capacitor.
EP Exposed Pad Exposed pad must be connected to the RTN pin. Solder to the system ground plane on application board for reduced thermal resistance.