SLASEC8C February 2017 – February 2023 PGA460-Q1
PRODUCTION DATA
The CONFIGURATION/STATUS command is used for the following:
When the CONFIGURATION/STATUS command is issued, the remaining data is transferred by using bit-like communication where a logical 1 and logical 0 are encoded (see GUID-B708BCB0-1646-4112-AEF4-686990C62507.html#X5782). #X6723 and #X6098 show a full-length CONFIGURATION/STATUS command.
As indicated, each CONFIGURATION/STATUS command frame consists of three data segments: subcommand field, data field, and frame checksum. The subcommands are defined and ordered by a 4-bit index field, where each subcommand can have a different data length in the data segment of the frame. Table 7-2 lists all PGA460-Q1 subcommands ordered according to their respective index.
INDEX | DESCRIPTION | DATA LENGTH (BITS) | ACCESS | EE | |
---|---|---|---|---|---|
0 | Temperature value | 8 | R | N | |
1 | Transducer frequency diagnostic value | 8 | 24 | R | N |
Decay period time diagnostic value | 8 | ||||
Noise level diagnostic value | 8 | ||||
2 | Driver frequency (FREQ) | 8 | R/W | Y | |
3 | Number of burst pulses for Preset1 (P1_PULSE) | 5 | 18 | R/W | Y |
Number of burst pulses for Preset2 (P2_PULSE) | 5 | ||||
Threshold comparator Deglitch (THR_CMP_DEG) | 4 | ||||
Burst pulses dead-time (PULSE_DT) | 4 | ||||
4 | Record time length for Preset1 (P1_REC) | 4 | 8 | R/W | Y |
Record time length for Preset2 (P2_REC) | 4 | ||||
5 | Threshold assignment for Preset1 (P1_THR_0 to P1_THR_15)#X2692 | 124 | R/W | N | |
6 | Threshold assignment for Preset2 (P2_THR_0 to P2_THR_15)#X2692 | 124 | R/W | N | |
7 | Band-pass filter bandwidth (BPF_BW) | 2 | 42 | R/W | Y |
Initial AFE gain (GAIN_INIT) | 6 | ||||
Low-pass filter cutoff frequency (LPF_CO) | 2 | ||||
Nonlinear scaling noise level (NOISE_LVL) | 5 | ||||
Nonlinear scaling exponent (SCALE_K) | 1 | ||||
Nonlinear scaling time offset (SCALE_N) | 2 | ||||
Temperature-scale gain (TEMP_GAIN) | 4 | ||||
Temperature-scale offset (TEMP_OFF) | 4 | ||||
P1 digital gain start threshold (P1_DIG_GAIN_LR_ST) | 2 | ||||
P1 digital long-range gain (P1_DIG_GAIN_LR) | 3 | ||||
P1 digital short-range gain (P1_DIG_GAIN_SR) | 3 | ||||
P2 digital gain start threshold (P2_DIG_GAIN_LR_ST) | 2 | ||||
P2 digital long-range gain (P2_DIG_GAIN_LR) | 3 | ||||
P2 digital short-range gain (P2_DIG_GAIN_SR) | 3 | ||||
8 | Time-varying gain Assignment (TV_GAIN0 to TV_GAIN6) | 56 | R/W | Y | |
9 | User-data memory (USER_1 to USER_20) | 160 | R/W | Y | |
10 | Frequency diagnostic window length (FDIAG_LEN) | 4 | 46 | R/W | Y |
Frequency diagnostic start time (FDIAG_START) | 4 | ||||
Frequency diagnostic error time threshold (FDIAG_ERR_TH) | 3 | ||||
Saturation diagnostic level (SAT_TH) | 4 | ||||
P1 nonlinear scaling (P1_NLS_EN) | 1 | ||||
P2 nonlinear scaling (P2_NLS_EN) | 1 | ||||
Supply overvoltage shutdown threshold (VPWR_OV_TH) | 2 | ||||
Sleep mode timer (LPM_TMR) | 2 | ||||
Voltage diagnostic threshold (FVOLT_ERR_TH) | 3 | ||||
AFE gain range (AFE_GAIN_RNG) | 2 | ||||
Low-power mode enable (LPM_EN) | 1 | ||||
Decouple time and temperature select (DECPL_TEMP_SEL) | 1 | ||||
Decouple time and temperature value (DECPL_T) | 4 | ||||
Disable current limit (DIS_CL) | 1 | ||||
Reserved | 1 | ||||
Driver current limit for Preset1 (CURR_LIM1) | 6 | ||||
Driver current limit for Preset2 (CURR_LIM2) | 6 | ||||
11 | Echo data-dump enable (DATADUMP_EN) | 1 | 8 | R/W | N |
EEPROM programming password (0xD) | 4 | ||||
EEPROM programming successful (EE_PRGM_OK) | 1 | ||||
Reload EEPROM (EE_RLOAD) | 1 | ||||
Program EEPROM (EE_PRGM) | 1 | ||||
12 | Echo data-dump values#X1074 | 1024 | R | N | |
13 | EEPROM user-bulk command (0x00 to 0x2B)#X9939 | 352 | R/W | Y | |
14 | Reserved | ||||
15 | EEPROM CRC value (EE_CRC) THR_CRC value (THR_CC) | 16 | R | Y |
The frame checksum value is generated by both the controller and peripheral devices, and is added after the data field, while calculated as the inverted eight bit sum with carry-over on all bits in the frame. The checksum calculation occurs byte-wise starting from the most-significant bit (MSB) which is the read-write (R/W) bit in the PGA460-Q1 write operation while for PGA460-Q1 read operation, this is the MSB of the data field. In cases where the number of bits on which the checksum field is calculated is not a multiple of eight, then the checksum operation pads trailing zeros until the closest multiple eight is achieved. Zero padding is only required for the checksum calculation. The zero-padded bits should not actually be transmitted over the IO-TCI interface.
The following example, is one example of a frame checksum calculation showing the PGA460-Q1 write operation of for subcommand Index 7 (42 data bits):
The following example, is a second example of a frame checksum calculation showing the PGA460-Q1 read operation of for subcommand index 8:
In addition, when a PGA460-Q1 write operation is issued, the PGA460-Q1 device implements an acknowledgment bit response to signify a correct data transfer occurred. In this case, if the CONFIGURATION/STATUS command time period is not detected properly, the PGA460-Q1 device does issue an acknowledgment bit. If the CONFIGURATION/STATUS command-time period is detected properly but the checksum of the transferred frame is not correct, then the PGA460-Q1 device transmits a logical 0 acknowledgment. If the CONFIGURATION/STATUS command-time period is detected properly and the checksum value matches the correct checksum, then the PGA460-Q1 device transmits a logical 1 acknowledgment.
In the case of a bit-like communication (PGA460-Q1 actively serving CONFIGURATION/STATUS command) when the bit stream is interrupted with another time command (either RUN or CONFIGURATION), the PGA460-Q1 device decodes this event as a bit-timed event in which case the execution of the initial CONFIGURATION/STATUS command continues until either a time-out error event is reached or, in the case of a continuous data transfer, the PGA460-Q1 frame checksum invalidates the incorrectly transferred frame. In the case where the bit-stream is valid but is longer than expected, the PGA460-Q1 executes on the correctly transferred frame but ignores the rest of the bit-stream.
If, during PGA460-Q1 IDLE state, the time-command interface receives a time command with pulse duration outside the limits of any of the commands, this condition is ignored and the PGA460-Q1 device remains in the IDLE state until a valid time command is received. In this case, the PGA460-Q1 does not respond with a negative acknowledgment.