For a read operation the controller sends a START condition, followed by the target address with the R/W bit set to 0b (signifying a write). The target acknowledges the write request, and the controller sends the command byte with the Auto-Increment bit and Register Pointer. After the Control Register, the controller will initiate a restart followed by the target address with the R/W bit set to 1b (signifying a read). The controller will continue to send out clock pulses but releases the SDA line so that the target can transmit data. At the end of every byte of data, the controller sends an ACK to the target, letting the target know that it is ready for more data. Once the controller has received the number of bytes it is expecting, it sends a NACK, signaling to the target to halt communications and release the SDA line. The controller follows this up with a STOP condition. Reading from a non-indexed register location will return 00h.

Figure 8-14 Read from Single Register

Multiple reads from the same register are also possible with the TMP114. Figure 8-15 shows how the controller can repeatedly read from the same register when the Auto-Increment bit in the control register is set to 0b. When reading from the same register in the same transaction the device must be read faster than the I²C timeout period.

Figure 8-15 Repeated Read from Single Register

The TMP114 also supports a continuous read from sequential registers. By setting the Auto-Increment bit in the control register to 1b, the TMP114 will increment the address pointer after each word of data is read from the device. This allows the controller to read multiple register values in the same transaction as shown in Figure 8-16. Currently, using a burst read will not clear the Alert Status register. It is recommended to use single register reads to clear Alert Status register contents.

Figure 8-16 Burst Read from Multiple Registers