SLVSDE4E march   2017  – june 2023 TPS61253A , TPS61253E

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Start-up
      2. 8.3.2 Enable and Disable
      3. 8.3.3 Undervoltage Lockout (UVLO)
      4. 8.3.4 Current Limit Operation
      5. 8.3.5 Load Disconnection
      6. 8.3.6 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Auto PFM Mode
      2. 8.4.2 Forced PWM Mode
      3. 8.4.3 Ultrasonic Mode
      4. 8.4.4 Pass-Through Mode
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 Inductor Selection
        3. 9.2.2.3 Output Capacitor
        4. 9.2.2.4 Input Capacitor
        5. 9.2.2.5 Checking Loop Stability
        6. 9.2.2.6 Application Curves
      3. 9.2.3 System Examples
  11.   Power Supply Recommendations
  12. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  13. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  14.   Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.2.5 Checking Loop Stability

The first step of circuit and stability evaluation is to look from a steady-state perspective at the following signals:

  • Switching node, SW
  • Inductor current, IL
  • Output ripple voltage, VOUT(AC)

These are the basic signals that need to be measured when evaluating a switching converter. When the switching waveform shows large duty cycle jitter or the oscillation happens for the output voltage or inductor current, the regulation loop can be unstable. This is often a result of board layout, L-C combination, or both.

As a next step in the evaluation of the regulation loop, the load transient response is tested. The time between the application of the load transient and the turn on of the high-side FET, the output capacitor must supply all of the current required by the load. VOUT immediately shifts by an amount equal to ΔI(LOAD) × ESR, where ESR is the effective series resistance of COUT. ΔI(LOAD) begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady-state value. The results are most easily interpreted when the device operates in PWM mode.

During this recovery time, VOUT can be monitored for settling time, overshoot, or ringing that helps judge the stability of the converter. Without any ringing, the loop has usually more than 45° of phase margin. Because the damping factor of the circuitry is directly related to several resistive parameters (for example, MOSFET rDS(on)) that are temperature dependent, the loop stability analysis has to be done over the input voltage range, load current range, and temperature range.