SLVSDE4E march   2017  – june 2023 TPS61253A , TPS61253E

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Start-up
      2. 8.3.2 Enable and Disable
      3. 8.3.3 Undervoltage Lockout (UVLO)
      4. 8.3.4 Current Limit Operation
      5. 8.3.5 Load Disconnection
      6. 8.3.6 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Auto PFM Mode
      2. 8.4.2 Forced PWM Mode
      3. 8.4.3 Ultrasonic Mode
      4. 8.4.4 Pass-Through Mode
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 Inductor Selection
        3. 9.2.2.3 Output Capacitor
        4. 9.2.2.4 Input Capacitor
        5. 9.2.2.5 Checking Loop Stability
        6. 9.2.2.6 Application Curves
      3. 9.2.3 System Examples
  11.   Power Supply Recommendations
  12. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  13. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  14.   Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

GUID-20201019-CA0I-DBFR-W0SG-C0QTZ9N668M4-low.gif Figure 6-1 9-Pin DSBGA YFF Package (Top View)
Table 6-1 Pin Functions
PIN I/O DESCRIPTION
NAME NO.
EN B3 I This is the enable pin of the device. Connecting this pin to ground forces the device into shutdown mode. Pulling this pin high enables the device. There is an internal resistor pulled to GND.
GND C1, C2 – Ground pin
MODE C3 – Operation mode selection pin
Mode = Low, the device works in the Auto PFM mode with good light load efficiency.
Mode = High, the device is in the forced PWM mode, keep the switching frequency be constant crossing the whole load range.
Mode = Floating, the device works in the ultrasonic mode; it keeps the switching frequency larger than 25 kHz to avoid the acoustic frequency toward no load condition.
SW B1, B2 I/O The switch pin of the converter. It is connected to the drain of the internal low-side power FET and the source of the internal high-side power FET.
VIN A3 I Power supply input
VOUT A1, A2 O Boost converter output