JAJSSE7 November 2023 DRV8214
PRODUCTION DATA
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NAME | RTE | ||
IPROPI | 1 | PWR | Analog current output proportional to load current. Connect a resistor from IPROPI to ground. |
VCC | 2 | PWR | Logic power supply. Bypass this pin to the GND pin with a 0.1-µF ceramic capacitor rated for VCC. |
RC_OUT | 3 | OD | Output of Ripple Counting algorithm. Can be programmed by I2C to output pulse train or logic level signal. |
nFAULT | 4 | OD | Fault indicator output. Pulled low during a fault condition. Connect an external pullup resistor for open-drain operation. |
VM | 5 | PWR | Motor power supply. Bypass this pin to the GND pin with a 0.1-µF ceramic capacitor as well as sufficient bulk capacitance rated for VM. |
OUT1 | 6 | O | H-bridge output. Connect directly to the motor. |
GND | 7 | PWR | Device ground. Connect to system ground. |
OUT2 | 8 | O | H-bridge output. Connect directly to the motor. |
A1 | 9 | I | I2C base address select pin. Tri-level input. |
A0 | 10 | I | I2C base address select pin. Tri-level input. |
nSLEEP | 11 | I | Sleep mode input. Logic high to enable device. Logic low to enter low-power sleep mode. Internal pulldown resistor. |
PH/IN2 | 12 | I | Controls the H-bridge output. Has internal pulldown. |
EN/IN1 | 13 | I | Controls the H-bridge output. Has internal pulldown. |
SDA | 14 | I | I2C data signal. The SDA pin requires a pullup resistor. |
SCL | 15 | I | I2C clock signal. |
VREF | 16 | I | Analog input to set current regulation and stall detection level. |
PAD | — | — | Thermal pad. Connect to board ground. For good thermal dissipation, use large ground planes on multiple layers, and multiple nearby vias connecting those planes. |