JAJSSE7 November   2023 DRV8214

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 I2C Timing Requirements
    7. 7.7 Timing Diagrams
    8. 7.8 Typical Operating Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 External Components
      2. 8.3.2 Summary of Features
      3. 8.3.3 Bridge Control
      4. 8.3.4 Current Sense and Regulation (IPROPI)
        1. 8.3.4.1 Current Sensing and Current Mirror Gain Selection
        2. 8.3.4.2 Current Regulation
          1. 8.3.4.2.1 Fixed Off-Time Current Regulation
          2. 8.3.4.2.2 Cycle-By-Cycle Current Regulation
      5. 8.3.5 Stall Detection
      6. 8.3.6 Ripple Counting
        1. 8.3.6.1 Ripple Counting Parameters
          1. 8.3.6.1.1  Motor Resistance Inverse
          2. 8.3.6.1.2  Motor Resistance Inverse Scale
          3. 8.3.6.1.3  KMC Scaling Factor
          4. 8.3.6.1.4  KMC
          5. 8.3.6.1.5  Filter Damping Constant
          6. 8.3.6.1.6  Filter Input Scaling Factor
          7. 8.3.6.1.7  Ripple Count Threshold
          8. 8.3.6.1.8  Ripple Count Threshold Scale
          9. 8.3.6.1.9  T_MECH_FLT
          10. 8.3.6.1.10 VSNS_SEL
          11. 8.3.6.1.11 Error Correction
            1. 8.3.6.1.11.1 EC_FALSE_PER
            2. 8.3.6.1.11.2 EC_MISS_PER
        2. 8.3.6.2 RC_OUT Output
        3. 8.3.6.3 Ripple Counting with nFAULT
      7. 8.3.7 Motor Voltage and Speed Regulation
        1. 8.3.7.1 Internal Bridge Control
        2. 8.3.7.2 Setting Speed/Voltage Regulation Parameters
          1. 8.3.7.2.1 Speed and Voltage Set
          2. 8.3.7.2.2 Speed Scaling Factor
        3. 8.3.7.3 Soft-Start and Soft-Stop
          1. 8.3.7.3.1 TINRUSH
      8. 8.3.8 Protection Circuits
        1. 8.3.8.1 Overcurrent Protection (OCP)
        2. 8.3.8.2 Thermal Shutdown (TSD)
        3. 8.3.8.3 VCC Undervoltage Lockout (UVLO)
        4. 8.3.8.4 Overvoltage Protection (OVP)
        5. 8.3.8.5 nFAULT Output
    4. 8.4 Device Functional Modes
      1. 8.4.1 Active Mode
      2. 8.4.2 Low-Power Sleep Mode
      3. 8.4.3 Fault Mode
    5. 8.5 Programming
      1. 8.5.1 I2C Communication
        1. 8.5.1.1 I2C Write
        2. 8.5.1.2 I2C Read
    6. 8.6 Register Map
      1. 8.6.1 DRV8214_STATUS Registers
      2. 8.6.2 DRV8214_CONFIG Registers
      3. 8.6.3 DRV8214_CTRL Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application: Brushed DC Motor
      1. 9.2.1 Design Requirements
      2. 9.2.2 Stall Detection
        1. 9.2.2.1 Application Description
          1. 9.2.2.1.1 Stall Detection Timing
          2. 9.2.2.1.2 Hardware Stall Threshold Selection
      3. 9.2.3 Ripple Counting Application
        1. 9.2.3.1 Tuning Ripple Counting Parameters
          1. 9.2.3.1.1 Resistance Parameters
          2. 9.2.3.1.2 KMC and KMC_SCALE
            1. 9.2.3.1.2.1 Case I
            2. 9.2.3.1.2.2 Case II
              1. 9.2.3.1.2.2.1 Method 1: Tuning from Scratch
                1. 9.2.3.1.2.2.1.1 Tuning KMC_SCALE
                2. 9.2.3.1.2.2.1.2 Tuning KMC
              2. 9.2.3.1.2.2.2 Method 2: Using the Proportionality factor
                1. 9.2.3.1.2.2.2.1 Working Example
          3. 9.2.3.1.3 Advanced Parameters
            1. 9.2.3.1.3.1 Filter Constants
              1. 9.2.3.1.3.1.1 FLT_GAIN_SEL
              2. 9.2.3.1.3.1.2 FLT_K
            2. 9.2.3.1.3.2 T_MECH_FLT
            3. 9.2.3.1.3.3 VSNS_SEL
            4. 9.2.3.1.3.4 Additional Error Corrector Parameters
              1. 9.2.3.1.3.4.1 EC_FALSE_PER
              2. 9.2.3.1.3.4.2 EC_MISS_PER
      4. 9.2.4 Motor Voltage
      5. 9.2.5 Motor Current
      6. 9.2.6 Application Curves
  11. 10Power Supply Recommendations
    1. 10.1 Bulk Capacitance
  12. 11Layout
    1. 11.1 Layout Guidelines
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.5 Electrical Characteristics

0 V ≤ VVM ≤ 11 V and 1.65 V ≤ VVCC ≤ 11 V, –40°C ≤ TJ ≤ 150°C (unless otherwise noted).
Typical values are at TJ = 27°C, VVM = 5 V, VVCC = 3.3 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLIES (VM, VCC)
IVMQ VM sleep mode current nSLEEP = 0 V, VVM = 5 V, VVCC = 3.3 V, TJ = 27°C, OVP disabled 100 170 nA
IVMQ_OVP VM sleep mode current nSLEEP = 0 V, VVM = 5 V, VVCC = 3.3 V, TJ = 27°C, OVP enabled 0.1 1 µA
IVM VM active mode current nSLEEP = 3.3 V, EN/IN1 = 3.3 V, PH/IN2 = 0 V, VVM = 5 V, VVCC = 3.3 V 1.3 1.9 mA
IVCCQ VCC sleep mode current nSLEEP = 0 V, VVM = 5 V, VVCC = 3.3 V, TJ = 27°C 1 3.0 nA
IVCC VCC active mode current nSLEEP = 3.3 V, EN/IN1 = 3.3 V, PH/IN2 = 0 V, VVM = 5 V, VVCC = 3.3 V 1.5 2 mA
tWAKE Turnon time nSLEEP = 1 to I2C ready 410 μs
LOGIC-LEVEL INPUTS (EN/IN1, PH/IN2, SDA, SCL, nSLEEP)
VIL Input logic low voltage 0 0.4 V
VIH Input logic high voltage 1.45 5.5 V
VHYS Input hysteresis 49 mV
IIL Input logic low current VI = 0 V -1 1 µA
IIH Input logic high current VI = 5 V 15 35 µA
RPD Input pulldown resistance, INx 200 kΩ
tDEGLITCH Input logic deglitch, INx 50 ns
TRI-LEVEL INPUTS (A1, A0)
VTHYS Tri-level input logic low voltage 0 0.4 V
ITIL Tri-level input Hi-Z voltage 0.75 1.05 V
ITIZ Tri-level input logic high voltage 1.45 5.5 V
RTPD Tri-level pulldown resistance to GND 90 kΩ
ITPU Tri-level pullup current to VCC 10 µA
OPEN-DRAIN OUTPUTS (nFAULT, RC_OUT, SDA)
VOL Output logic low voltage IOD = 5 mA 0.4 V
IOZ Output logic high current VOD = VCC -1 1 µA
tPW_RC RC_OUT pulse width 30 50 70 µs
tPW_nFAULT nFAULT low pulse width RC Count overflow, RC_REP = 11b 30 50 70 µs
CB SDA capacitive load for each bus line 400 pF
DRIVER OUTPUTS (OUTx)
RDS(ON)_HS High-side MOSFET on resistance IOUTx = 1 A; TJ = 25 °C 120 155 mΩ
RDS(ON)_HS High-side MOSFET on resistance IOUTx = 1 A; TJ = 125 °C 180 220 mΩ
RDS(ON)_HS High-side MOSFET on resistance IOUTx = 1 A; TJ = 150 °C 200 250 mΩ
RDS(ON)_LS Low-side MOSFET on resistance, CS_GAIN_SEL = 000b IOUTx = -1 A; TJ = 25 °C 120 145 mΩ
RDS(ON)_LS Low-side MOSFET on resistance, CS_GAIN_SEL = 000b IOUTx = -1 A; TJ = 125 °C 180 220 mΩ
RDS(ON)_LS Low-side MOSFET on resistance, CS_GAIN_SEL = 000b IOUTx = -1 A; TJ = 150 °C 200 250 mΩ
RDS(ON)_LS Low-side MOSFET on resistance, CS_GAIN_SEL = 010b IOUTx = -250 mA; TJ = 25 °C 440 530 mΩ
RDS(ON)_LS Low-side MOSFET on resistance, CS_GAIN_SEL = 010b IOUTx = -250 mA; TJ = 125 °C 660 800 mΩ
RDS(ON)_LS Low-side MOSFET on resistance, CS_GAIN_SEL = 010b IOUTx = -250 mA; TJ = 150 °C 750 900 mΩ
RDS(ON)_LS Low-side MOSFET on resistance, CS_GAIN_SEL = 110b IOUTx = -50 mA; TJ = 25 °C 2040 2450 mΩ
RDS(ON)_LS Low-side MOSFET on resistance, CS_GAIN_SEL = 110b IOUTx = -50 mA; TJ = 125 °C 3050 3650 mΩ
RDS(ON)_LS Low-side MOSFET on resistance, CS_GAIN_SEL = 110b IOUTx = -50 mA; TJ = 150 °C 3450 4150 mΩ
VSD Body diode forward voltage IOUTx = -1 A 0.9 V
tRISE Output rise time VOUTx rising from 10% to 90% of VVM 100 ns
tFALL Output fall time VOUTx falling from 90% to 10% of VVM 50 ns
tPD Input to output propagation delay Input to OUTx 650 ns
tDEAD Output dead time 500 ns
CURRENT SENSE AND REGULATION (IPROPI, VREF)
VREF_INT Internal reference voltage INT_VREF = 1b 480 500 520 mV
AIPROPI_H Current scaling factor CS_GAIN_SEL = 000b, 350 mA to 2A 244 µA/A
AIPROPI_M Current scaling factor CS_GAIN_SEL = 010b, 60 mA to 350 mA 1156 µA/A
AIPROPI_L Current scaling factor CS_GAIN_SEL = 110b, 10 mA to 60 mA 5320 µA/A
AERR_H Current mirror total error, GAINSEL = 000b IOUT = 1 A, VIPROPI ≤ min(VM-1.25 V, 3.3 V), 3.3 V ≤ VVM ≤ 11 V -5 5 %
IOUT = 1 A, VIPROPI ≤ min(VM-1.25 V, 3.3 V), 1.65 V ≤ VVM ≤ 3.3 V -5 5 %
AERR_M Current mirror total error, GAINSEL = 010b IOUT = 250 mA, VIPROPI ≤ min(VM-1.25 V, 3.3 V), 3.3 V ≤ VVM ≤ 11 V -5 5 %
IOUT = 250 mA, VIPROPI ≤ min(VM-1.25 V, 3.3 V), 1.65 V ≤ VVM ≤ 3.3 V -5 5 %
AERR_L Current mirror total error, GAINSEL = 110b IOUT = 50 mA, VIPROPI ≤ min(VM-1.25 V, 3.3 V), 3.3 V ≤ VVM ≤ 11 V -6.5 6.5 %
IOUT = 50 mA, VIPROPI ≤ min(VM-1.25 V, 3.3 V), 1.65 V ≤ VVM ≤ 3.3 V -6.5 6.5 %
tOFF Current regulation off time 20 µs
tBLANK Current sense blanking time TBLANK = 0b 1.8 µs
tBLANK Current sense blanking time TBLANK = 1b 1 µs
tDEG Current regulation and stall detection deglitch time TDEG = 0b 2 µs
tDEG Current regulation and stall detection deglitch time TDEG = 1b 1 µs
tINRUSH Inrush time blanking for stall detection 5 6716 ms
Voltage regulation
ΔVLINE Line regulation 4 V ≤ VVM ≤ 11 V, VVCC = 3.3 V, VOUT = 3.3 V, IOUT = 2 A ±1%
ΔVLOAD Load regulation VVM = 5 V, VVCC = 3.3 V, VOUT = 3.3 V, IOUT = 100 mA to 2 A ±3%
PROTECTION CIRCUITS
VUVLO_VCC VCC supply undervoltage lockout (UVLO) Supply rising 1.65 V
Supply falling 1.30 V
VUVLO_HYS Supply UVLO hysteresis Rising to falling threshold 120 mV
tUVLO Supply undervoltage deglitch time VVCC falling to OUTx disabled 10 µs
VOVP_TH Overvoltage protection threshold VOUT - VVM 200 mV
tOVP_ON Overvoltage protection turn-on time 13 µs
tOVP_OFF Overvoltage protection turn-off time 250 µs
IOCP Overcurrent protection trip point, CS_GAIN_SEL = 000b 4 A
IOCP Overcurrent protection trip point, CS_GAIN_SEL = 010b 0.8 A
IOCP Overcurrent protection trip point, CS_GAIN_SEL = 110b 0.16 A
tOCP Overcurrent protection deglitch time 2 µs
tRETRY Retry time 1.7 ms
TTSD Thermal shutdown temperature 157 175 193 °C
THYS Thermal shutdown hysteresis 18 °C