JAJSM95A May   2023  – December 2023 DRV8845

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Operating Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Motor Configurations
      2. 7.3.2 Stepper Control Logic
      3. 7.3.3 DC Motor Control
      4. 7.3.4 PWM Current Control
      5. 7.3.5 Current Regulation and Decay Mode
      6. 7.3.6 Blanking Time
      7. 7.3.7 Charge Pump
      8. 7.3.8 Logic-Level Pin Diagram
      9. 7.3.9 Protection Circuits
        1. 7.3.9.1 VM Undervoltage Lockout (UVLO)
        2. 7.3.9.2 VCP Undervoltage Lockout (CPUV)
        3. 7.3.9.3 Overcurrent Protection (OCP)
        4. 7.3.9.4 Thermal Shutdown (OTSD)
        5. 7.3.9.5 Fault Condition Summary
    4. 7.4 Device Functional Modes
      1. 7.4.1 Sleep Mode (nSLEEP = 0)
      2. 7.4.2 Operating Mode (nSLEEP = 1)
      3. 7.4.3 nSLEEP Reset Pulse
      4. 7.4.4 Functional Modes Summary
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Application Schematics
    3. 8.3 Application Curves
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Bulk Capacitance
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.4.3 nSLEEP Reset Pulse

A fault can be cleared through a quick nSLEEP pulse. This pulse width must be greater than 20 µs and shorter than 40 µs. If nSLEEP is low for longer than 40 µs but less than 120 µs, the faults are cleared and the device may or may not shutdown, as shown in the timing diagram. This reset pulse does not affect the status of the charge pump or other functional blocks.

GUID-20220521-SS0I-ZG2W-WRKB-MDZ65H11D4WQ-low.svgFigure 7-9 nSLEEP Reset Pulse