SNOA475F October   2016  – September 2020 LMV791

 

  1.   Trademarks
  2. 1Introduction
  3. 2What Parameters Should Be Tested?
    1. 2.1  Open-Loop Gain (AOL) and Phase Margin
    2. 2.2  Slew Rate
    3. 2.3  Common-Mode Rejection Ratio (CMRR) and Power Supply Rejection Ratio (PSRR)
    4. 2.4  Open-Loop Output Impedance (Zo)
    5. 2.5  Voltage Noise (en)
    6. 2.6  Current Noise (in)
    7. 2.7  Input Offset Voltage (VOS), Input Bias Current (Ib), and Quiescent Current (IQ)
    8. 2.8  Output Voltage Versus Output Current (Claw Curve)
    9. 2.9  Overload Recovery Time (tOR)
    10. 2.10 Common-mode Input Capacitance (CCM) and Common-mode Differential Capacitance (CDIFF)
    11. 2.11 Overshoot and Transient Response
    12. 2.12 Common-Mode Voltage Range (CMVR)
  4. 3Conclusion
  5.   Revision History

Common-mode Input Capacitance (CCM) and Common-mode Differential Capacitance (CDIFF)

There are two types of input capacitances, namely: a differential (CDIFF) and common-mode (CCM) . CDIFF, is the input capacitance between the non-inverting and inverting pins of an op amp. CCM, is the parasitic capacitance between each input pins and ground. Figure 2-34 shows a visual representation of CDIFF and CCM for OPA2375. Input capacitance can be found in the electrical characteristics table of the data sheet as shown in Figure 2-35.

GUID-A8E093C3-2479-4D85-9270-0976C613A254-low.gifFigure 2-34 Input Capacitance Illustration for OPA2375
GUID-1973CB1B-C060-4669-ACAA-3DA5546789F1-low.gifFigure 2-35 Data Sheet Specifications of Input Capacitance Values for OPA2375
Op amps with low input capacitance are useful in applications such as: smoke detectors and photodiode transimpedance amplifier circuits. Input capacitance at the inverting input can affect the stability of an op amp circuit causing phase shift or delay. The feedback network can interact with the input capacitance to create unwanted pole causing stability issues if the impedance values are not carefully selected. Op amps similar to OPA2375

with low input capacitance can help increase the frequency of pole in the feedback path far enough that it has negligible effect on the circuit. To ensure stability, it is important to make sure the pole created due to the interaction between input capacitance and the feedback impedance is at least 2 to 10 times larger in frequency as compared to the bandwidth of the circuit.

Figure 2-36 and Figure 2-38 show the circuits to simulate CCM and CDIFF. Ensure that the power supply voltage and other test conditions match closely with the op amp's datasheet. In the CCM test circuit, the op amp is configured as a buffer circuit with a 100kΩ in series with the non-inverting input of the op amp. Using the -3dB frequency of the bode plot at the non-inverting input of the op amp, CCM can be simulated and calculated as shown in Figure 2-37. Similarily Figure 2-39 shows the simulated CDIFF for OPA2375 and corresponding calculation. For more information on common-mode and differential input capacitances, please refer to "The Signal" authored by Bruce Trump. This circuit may be simulated by downloading the AN1516 Test Circuits in either TINA-TI™ or PSpice® for TI.

GUID-7B652704-7277-4F0F-BE7E-43BC0D267DB5-low.gifFigure 2-36 Common-Mode Input Capacitance (CCM) Test Circuit
GUID-4DD16CC3-59D9-450C-9310-B6D39E167C52-low.gifFigure 2-37 Simulated Common-Mode Input Capacitance (CCM) for OPA2375
GUID-E06604E0-6F2B-4D6E-857B-AB62AB9683BF-low.gifFigure 2-38 Differential Input Capacitance (CDIFF) Test Circuit
GUID-1A0AF646-0151-4946-BF6D-249C3E3C1CC9-low.gifFigure 2-39 Simulated Differential Input Capacitance (CDIFF) for OPA2375