Emulators / Analyzers

IEEE 1149.1 (JTAG) Emulation Overview

Texas Instruments invented JTAG scan-based emulation, an approach that has since been broadly adopted for embedded systems development. JTAG emulation is now widely preferred over the older and more expensive "in-circuit emulation", or "ICE" technology. In-Circuit Emulation replaces the target processor with a different device that acts like, or "emulates", the original device, but has additional pins to make internal structures on the device, like busses, visible. In-Circuit Emulation is limited because the cost of supporting high-speed processors beyond 200 MHz quickly becomes prohibitive.

The JTAG emulation technology used by TI' XDS-series emulators eliminates these debugging costs and difficulties by communicating directly with the processor, avoiding a special emulation device altogether. JTAG lets data be moved on- and off-chip non-intrusively, without interrupting the executing device. TI then augments this capability with additional emulation logic to provide even greater visibility and access into registers and other internal functions such as on-chip cache memories. JTAG emulation is also widely preferred over monitor based solutions as JTAG solutions do not need valuable processor resources.

JTAG also acts as a connection for boundary scan. Boundary scan is valuable in ensuring the quality of products during manufacturing. Boundary scan can be used to perform board and system-level tests that can detect and diagnose pin-level structural faults such as opens and shorts.

IEEE 1149.7 Overview

IEEE 1149.7 is complementary superset of the widely adopted IEEE 1149.1 (JTAG) standard that has been in use for more than two decades. IEEE 1149.7 adds substantial functionality to the existing standard, but it is not a replacement for IEEE 1149.1. Backward compatibility is maintained so that any a board or system that integrates chips that support either standard is amenable to test or debug procedures.

The new IEEE 1149.7 standard offers embedded designers several benefits, including:
  • The ability to control debug logic power consumption in an industry standard way. Whereas IEEE 1149.1 (JTAG) had a single "always on" state, IEEE 1149.7 offers four selectable power modes to enable ultra-low power devices.
  • The ability to quickly access a specific device in a system with multiple devices. By implementing a system level bypass, the scan chain is drastically shorter, which directly improves the debugging experience.
  • The introduction of a star topology to complement the standard serial topology. Designers working with stacked-die devices, multi-chip modules and plug-in cards will favor the star topology because it simplifies the physical inter-device connections.
  • Two-pin operation instead of the four-pin operation required in IEEE 1149.1. Since most of today's systems integrate multiple ICs and often have severe size constraints, reducing the number of pins and traces will help designers meet their form factor goals and allowing for additional functional pins and/or low package cost.
  • Compatibility with existing IEEE 1149.1 (JTAG) compliant IP, allowing preservation of investment.
Advanced Event Triggering

Advanced Event Triggering is a key TI emulation capability that is a part of the device itself. Advanced Event Triggering is the ability to detect combinations of target processor events, and then perform actions such as halt the CPU.

In short, what Advanced Event Triggering can do is:
  • Perform the most frequently needed debug tasks, such as hardware breakpoints and watchpoints (data read/write to memory)
  • Analyze and benchmark system performance with event counters
  • Fix hard-to-find bugs that require detecting complex combinations and sequences of events
Trace

Processor Trace, available on selected devices to help customers find previously "invisible" complex real-time bugs. Trace can detect the really hard to find bugs - race conditions between events, intermittent real-time glitches, crashes from stack overflows, runaway code and false interrupts without stopping the processor. Trace is a completely non-intrusive debug method that relies on a debug unit inside the DSP so it does not interfere or change the application's real-time behavior.

Trace can fine tune code performance and cache optimization of complex switch intensive multi-channel applications. Processor Trace supports the export of program, data, timing and selected processor and system events/interrupts. Processor Trace can be exported either to an external emulator, or on selected devices, to an on chip buffer Embedded Trace Buffer (ETB).

Support for TI devices

TI provides XDS class emulators that support real-time JTAG scan-based emulation with product support across the TI product line of microcontrollers to application processors.

These emulators are integrated with the Code Composer Studio IDE [Link to CCS Overview]to make all of TI's real-time emulation control and visualization capabilities available to developers.

TI third parties provide logic analyzers, hardware testing equipment, and a wide array of emulators that support different host I/O interfaces, such as USB, Ethernet, etc.

Additional Resources