TI DSP + ARM processors include a wide range of device choices that deliver the highest performance at the lowest power levels and costs. TI DSP + ARM solutions range from single core ARM9 + C674x DSP to quad-core ARM Cortex-A15 + 8xC66x DSP cores.
Many system advantages can be realized with the integration of ARM and DSP cores including cost, power and area savings. TI ARM + DSP solutions are optimized for embedded systems with a focus on power savings and real-time performance.
Featuring the Keystone architecture, TI's innovative design methodology for System-on- Chip (SoC) processors, this unique combination of architecture and design methodology enables full utilization of all cores and interfaces without degradation.
|Core Speed||456MHz||1.25GHz – 1.4GHz||1.0GHz – 1.4GHz (ARM)
1.0 – 1.2 GHz (DSP)
|ARM Core Type||1x ARM9||4x Cortex-A15||4x Cortex-A15||2x Cortex-A15|
|Max DMIPs ARM Cores||456 (@456MHz)||19600 (@1.4GHz)||19600 (@1.4GHz)||8400 (@1.2GHz)|
|DSP Cores||1x C647x||1x C66x||8x C66x||4x C66x|
|Max GMACs||3.648@ 456MHz||44.8@ 1.4GH||307.2@ 1.2GHz||153.6@ 1.2GHz|
(DSP + NEON)
|L1 KB per core||64||32D/32P||32D/32P||32D/32P (ARM)
|L2 Shared Cache||256 KB||4 MB||4 MB||1 MB|
|Shared SRAM||128 KB||2 MB||6 MB||3 MB|
|DDR (with ECC)
|16b DDR2 150MHz||64b 1600 MHz||2x 64b 1600 MHz||64b 1600 MHz|
|Gigabit Ethernet||10/100||8 lanes||4 lanes||4 lanes|
|10 Gigabit Ethernet||No||2 lanes||2 lanes||No|
|PCI Express Gen 2||No||2 lanes of x2||1 lanes of x2||1 lanes of x2|
|Serial RapidIO||No||No||1x4 or 2x2 o r4x1||No|
|Extended Case Temperature||-40°C to
|Learn More||Learn more about OMAP-L138||Learn more about 66AK2E05||Learn more about 66AK2H14||Learn more about 66AK2L06|