홈 전원 관리 게이트 드라이버 절연 게이트 드라이버
홈
전원 관리
게이트 드라이버
절연 게이트 드라이버

ISO5852S-Q1

활성

분할 출력 및 활성 보호를 지원하는 오토모티브 5.7kVrms, 2.5A/5A 단일 채널 절연 게이트 드라이버

지금 주문
데이터시트

이 제품의 최신 버전이 있습니다

open-in-new 대안 비교
다른 핀 출력을 지원하지만 비교 대상 장치와 동일한 기능
UCC21750-Q1 활성 IGBT/SiC용 DESAT 및 내부 클램프를 지원하는 오토모티브 5.7kVrms, ±10A 단일 채널 절연 게이트 드라이버 Newer generation, integrated Analog-to-PWM sensor

ISO5852S-Q1

활성
데이터시트 지금 주문

제품 상세 정보

Number of channels 1 Isolation rating Reinforced Withstand isolation voltage (VISO) (Vrms) 5700 Working isolation voltage (VIOWM) (Vrms) 2121 Transient isolation voltage (VIOTM) (VPK) 8000 Power switch IGBT, MOSFET, SiCFET Peak output current (A) 5 Features Active miller clamp, Fault reporting, Power good, Short circuit protection, Soft turn-off, Soft turnoff, Split output Output VCC/VDD (max) (V) 30 Output VCC/VDD (min) (V) 15 Input supply voltage (min) (V) 2.25 Input supply voltage (max) (V) 5.5 Propagation delay time (µs) 0.076 Input threshold CMOS Operating temperature range (°C) -40 to 125 Rating Automotive Bootstrap supply voltage (max) (V) 2121 Rise time (ns) 18 Fall time (ns) 20 Undervoltage lockout (typ) (V) 12
Number of channels 1 Isolation rating Reinforced Withstand isolation voltage (VISO) (Vrms) 5700 Working isolation voltage (VIOWM) (Vrms) 2121 Transient isolation voltage (VIOTM) (VPK) 8000 Power switch IGBT, MOSFET, SiCFET Peak output current (A) 5 Features Active miller clamp, Fault reporting, Power good, Short circuit protection, Soft turn-off, Soft turnoff, Split output Output VCC/VDD (max) (V) 30 Output VCC/VDD (min) (V) 15 Input supply voltage (min) (V) 2.25 Input supply voltage (max) (V) 5.5 Propagation delay time (µs) 0.076 Input threshold CMOS Operating temperature range (°C) -40 to 125 Rating Automotive Bootstrap supply voltage (max) (V) 2121 Rise time (ns) 18 Fall time (ns) 20 Undervoltage lockout (typ) (V) 12
SOIC (DW) 16 106.09 mm² 10.3 x 10.3
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range
    • Device HBM Classification Level 3A
    • Device CDM Classification Level C6
  • 100-kV/μs Minimum Common-Mode Transient Immunity (CMTI) at VCM = 1500 V
  • Split Outputs to Provide 2.5-A Peak Source and
    5-A Peak Sink Currents
  • Short Propagation Delay: 76 ns (Typ),
    110 ns (Max)
  • 2-A Active Miller Clamp
  • Output Short-Circuit Clamp
  • Soft Turn-Off (STO) during Short Circuit
  • Fault Alarm upon Desaturation Detection is Signaled on FLT and Reset Through RST
  • Input and Output Undervoltage Lockout (UVLO) with Ready (RDY) Pin Indication
  • Active Output Pulldown and Default Low Outputs with Low Supply or Floating Inputs
  • 2.25-V to 5.5-V Input Supply Voltage
  • 15-V to 30-V Output Driver Supply Voltage
  • CMOS Compatible Inputs
  • Rejects Input Pulses and Noise Transients Shorter Than 20 ns
  • Isolation Surge Withstand Voltage 12800-VPK
  • Safety-Related Certifications:
    • 8000-VPK VIOTM and 2121-VPK VIORM Reinforced Isolation per DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
    • 5700-VRMS Isolation for 1 Minute per UL 1577
    • CSA Component Acceptance Notice 5A, IEC 60950–1 and IEC 60601–1 End Equipment Standards
    • TUV Certification per EN 61010-1 and EN 60950-1
    • GB4943.1-2011 CQC Certification
    • All Certifications Complete per UL, VDE, CQC, TUV and Planned for CSA

All trademarks are the property of their respective owners.

  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range
    • Device HBM Classification Level 3A
    • Device CDM Classification Level C6
  • 100-kV/μs Minimum Common-Mode Transient Immunity (CMTI) at VCM = 1500 V
  • Split Outputs to Provide 2.5-A Peak Source and
    5-A Peak Sink Currents
  • Short Propagation Delay: 76 ns (Typ),
    110 ns (Max)
  • 2-A Active Miller Clamp
  • Output Short-Circuit Clamp
  • Soft Turn-Off (STO) during Short Circuit
  • Fault Alarm upon Desaturation Detection is Signaled on FLT and Reset Through RST
  • Input and Output Undervoltage Lockout (UVLO) with Ready (RDY) Pin Indication
  • Active Output Pulldown and Default Low Outputs with Low Supply or Floating Inputs
  • 2.25-V to 5.5-V Input Supply Voltage
  • 15-V to 30-V Output Driver Supply Voltage
  • CMOS Compatible Inputs
  • Rejects Input Pulses and Noise Transients Shorter Than 20 ns
  • Isolation Surge Withstand Voltage 12800-VPK
  • Safety-Related Certifications:
    • 8000-VPK VIOTM and 2121-VPK VIORM Reinforced Isolation per DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
    • 5700-VRMS Isolation for 1 Minute per UL 1577
    • CSA Component Acceptance Notice 5A, IEC 60950–1 and IEC 60601–1 End Equipment Standards
    • TUV Certification per EN 61010-1 and EN 60950-1
    • GB4943.1-2011 CQC Certification
    • All Certifications Complete per UL, VDE, CQC, TUV and Planned for CSA

All trademarks are the property of their respective owners.

The ISO5852S-Q1 device is a 5.7-kVRMS, reinforced isolated gate driver for IGBTs and MOSFETs with split outputs, OUTH and OUTL, providing 2.5-A source and 5-A sink current. The input side operates from a single 2.25-V to 5.5-V supply. The output side allows for a supply range from minimum 15 V to maximum 30 V. Two complementary CMOS inputs control the output state of the gate driver. The short propagation time of 76 ns provides accurate control of the output stage.

An internal desaturation (DESAT) fault detection recognizes when the IGBT is in an overcurrent condition. Upon a DESAT detect, a mute logic immediately blocks the output of the isolator and initiates a soft-turnoff procedure which disables the OUTH pin and pulls the OUTL pin to low over a time span of 2 μs. When the OUTL pin reaches 2 V with respect to the most-negative supply potential, VEE2, the gate-driver output is pulled hard to the VEE2 potential, turning the IGBT immediately off.

When desaturation is active, a fault signal is sent across the isolation barrier, pulling the FLT output at the input side low and blocking the isolator input. Mute logic is activated through the soft-turnoff period. The FLT output condition is latched and can be reset only after the RDY pin goes high, through a low-active pulse at the RST input.

When the IGBT is turned off during normal operation with a bipolar output supply, the output is hard clamp to VEE2. If the output supply is unipolar, an active Miller clamp can be used, allowing Miller current to sink across a low-impedance path which prevents the IGBT from dynamic turnon during high-voltage transient conditions.

The readiness for the gate driver to be operated is under the control of two undervoltage-lockout circuits monitoring the input-side and output-side supplies. If either side has insufficient supply, the RDY output goes low, otherwise this output is high.

The ISO5852S-Q1 device is available in a 16-pin SOIC package. Device operation is specified over a temperature range from –40°C to +125°C ambient.

For all available packages, see the orderable addendum at the end of the data sheet.

The ISO5852S-Q1 device is a 5.7-kVRMS, reinforced isolated gate driver for IGBTs and MOSFETs with split outputs, OUTH and OUTL, providing 2.5-A source and 5-A sink current. The input side operates from a single 2.25-V to 5.5-V supply. The output side allows for a supply range from minimum 15 V to maximum 30 V. Two complementary CMOS inputs control the output state of the gate driver. The short propagation time of 76 ns provides accurate control of the output stage.

An internal desaturation (DESAT) fault detection recognizes when the IGBT is in an overcurrent condition. Upon a DESAT detect, a mute logic immediately blocks the output of the isolator and initiates a soft-turnoff procedure which disables the OUTH pin and pulls the OUTL pin to low over a time span of 2 μs. When the OUTL pin reaches 2 V with respect to the most-negative supply potential, VEE2, the gate-driver output is pulled hard to the VEE2 potential, turning the IGBT immediately off.

When desaturation is active, a fault signal is sent across the isolation barrier, pulling the FLT output at the input side low and blocking the isolator input. Mute logic is activated through the soft-turnoff period. The FLT output condition is latched and can be reset only after the RDY pin goes high, through a low-active pulse at the RST input.

When the IGBT is turned off during normal operation with a bipolar output supply, the output is hard clamp to VEE2. If the output supply is unipolar, an active Miller clamp can be used, allowing Miller current to sink across a low-impedance path which prevents the IGBT from dynamic turnon during high-voltage transient conditions.

The readiness for the gate driver to be operated is under the control of two undervoltage-lockout circuits monitoring the input-side and output-side supplies. If either side has insufficient supply, the RDY output goes low, otherwise this output is high.

The ISO5852S-Q1 device is available in a 16-pin SOIC package. Device operation is specified over a temperature range from –40°C to +125°C ambient.

For all available packages, see the orderable addendum at the end of the data sheet.
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모두 보기14
유형 직함 날짜
* Data sheet ISO5852S-Q1 High-CMTI 2.5-A and 5-A Reinforced Isolated IGBT, MOSFET Gate Driver With Split Outputs and Active Protection Features datasheet (Rev. A) PDF | HTML 2016/12/22
Certificate VDE Certificate for Reinforced Isolation for DIN EN IEC 60747-17 (Rev. S) 2024/02/29
Certificate ISO5x5x CQC Certificate of Product Certification 2023/11/07
User guide UCC217xx and ISO5x5x Half-Bridge EVM User's Guide for Wolfspeed 1200-V SiC 2023/09/01
Certificate ISO5451 CQC Certificate of Product Certification 2023/08/16
Certificate TUV Certificate for Isolation Devices (Rev. K) 2022/08/05
Certificate UL Certificate of Compliance File E181974 Vol 4 Sec 6 (Rev. P) 2022/08/05
Application note Comparative Analysis of Two Different Methods for Gate-Drive Current Boosting (Rev. A) PDF | HTML 2022/02/17
Application brief The Use and Benefits of Ferrite Beads in Gate Drive Circuits PDF | HTML 2021/12/16
Certificate CSA Certification (Rev. Q) 2021/06/14
Application brief External Gate Resistor Selection Guide (Rev. A) 2020/02/28
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 2020/02/28
Application note Isolation Glossary (Rev. A) 2017/09/19
EVM User's guide ISO5852S Evaluation Module User's Guide (Rev. A) 2015/09/08

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

ISO5852SEVM — 강화 절연 IGBT 게이트 드라이버 평가 모듈

This evaluation module, featuring ISO5852S reinforced isolated gate driver device, allows designers to evaluate device AC and DC performance with a pre-populated 1-nF load or with a user-installed IGBT in either of the standard TO-247 or TO-220 packages.

사용 설명서: PDF
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시뮬레이션 모델

ISO5852S Unencrypted PSPICE Transient Model

SLLM446.ZIP (4 KB) - PSpice Model
다운로드
시뮬레이션 툴

PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®

TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
요청
레퍼런스 디자인

TIDA-020014 — 3가지 유형의 IGBT/SiC 바이어스-공급 솔루션을 사용한 HEV/EV 트랙션 인버터 전력계 레퍼런스 설계

이 레퍼런스 디자인은 하이브리드 전기 자동차 및 전기 자동차(HEV/EV) 시스템을 위한 12V 자동차 배터리 입력, 4.2W 바이어스 공급 솔루션을 갖춘 트랙션 인버터 단상 전원 단계를 제시합니다. 모든 바이어스 전원 솔루션은 12V 자동차 배터리에서 4.5V~42V의 넓은 입력 범위를 허용하고, +15V - 8V 또는 +20V - 4V구성 및 최대 180mA의 출력 전류를 생성합니다. 이 전력계는 5.7kVRMS 강화 절연을 지원하는 절연 게이트 드라이버와 100mm×에서 설계하고 SiC/IGBT 하프 브리지 모듈에 (...)
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDA-00794 — HEV/EV 트랙션 인버터용 IGBT 모듈 열 보호 레퍼런스 설계

The TIDA-00794 reference design is a temp sensing solution for IGBT thermal protection in HEV/EV traction inverter system. It monitors the IGBT temperature via the NTC thermistor integrated inside the IGBT module. It provides thermal shut down to the IGBT gate drivers once the NTC thermistor (...)
Design guide: PDF
회로도: PDF
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