PowerWise Adaptive Voltage Scaling (AVS)
AVS is a real-time, continuous, closed-loop power management technology. The AVS technology enables optimum energy management delivery to processors, ASICs, and SoCs by optimizing supply voltages adaptively over process and temperature variations in order to maximize system-level energy savings. Read more
Adaptive Voltage Scaling Technology Features:
- Process and Temperature Compensation
- Real-time continuous closed-up
- Typically 40% savings versus fixed voltage scheme
In order to address tomorrow's energy-saving needs, Texas Instrument introduces Adaptive Voltage Scaling Technology. AVS is suited to power constrained applications such as portable devices, USB powered peripherals, consumer electronics, and high volume systems such as data centers and cellular base stations. Anywhere that an ASIC, processor, SoC or is used, AVS can be implemented.
Several non-intrusive blocks, provided by Texas Instrument, are embedded into the ASIC/SoC to determine its profile. Hardware Power Monitor (HPM) is designed into the ASIC/SoC together with an Advanced Power Controller (APC) to monitor the performance of the silicon based on process and temperature variation. Information is fed back to an Energy Management Unit (EMU) which then sets the voltage precisely according to needs. AVS technology is process and architectural independent. Learn more
Adaptive Voltage Scaling impact both dynamic energy and static (leakage) energy consumption.The Energy saving by implementing AVS technology depends on process geometry, design implementation, frequency scaling, and other factors.
|Solve Leakage and Dynamic Power Loss||Mobile Handset DesignLine||July 2008|
|Processor Energy Savings Through Adaptive Voltage Scaling||Portable Design||March 2008|
|Tip of the Week: Maximize processor energy savings in media-intensive mobile devices with adaptive voltage scaling||Mobile Handset DesignLine||July 2007|
|Saving Energy via Smart Power Management||Power Designer||June 2007|
APC3 IP Package - PowerWise Advanced Power Controller with SPMI support for multi-voltage domain processors
EMU Solutions - Texas Instrument features a wide range of Energy Management Unit solutions available for various applications.
PWI Standard - ARM and Texas Instrument collaborated with industry leaders such as Samsung Semiconductor, NXP, Matsushita Industrial Electric (Panasonic) and ST Microelectronics to create the PWI standard for point-to-point and multipoint bus interfaces pwistandard.com.
SPMI Standard - MIPI's SPMI standard is a two-wire, multi-drop bus optimized for power management and control traffic occurring between the application processor, peripheral devices and other processors. The standard enhances system interoperability and enables faster mobile platform deployment. For more information on the MIPI SPMI, visit www.mipi.org.
1. What is PowerWise® AVS technology?
2. What applications benefit from this technology?
3. What is the difference between Dynamic Voltage Scaling (DVS) and Adaptive Voltage Scaling (AVS)?
4. How does the PowerWise Interface differ from other industry standard interface solutions on the market like I2C, SPI, and SMBus?
5. Can I still use PowerWise AVS Energy Management Units (EMUs) without the PowerWise Interface and the APC IP?
6. What levels of improvements in energy management are we likely to see as a result of implementing PowerWise AVS technology?
7. What processors is PowerWise AVS technology compatible with?
8. What is the difference between the first, second and third generation of PowerWise AVS technology?
9. What industry standard does PowerWise AVS comply with?
10. Are the SPMI and PWI2.0 backward compatible with PWI1.0?
11. What impact will AVS have in my system?
12. What current PowerWise AVS EMUs does TI have available?
13. How do I become a PowerWise AVS licensee?
14. Where do I buy PowerWise AVS compatible regulators or Energy Management Unit (EMU)?
A: Texas Instrument's PowerWise Adaptive Voltage Scaling Technology is an active system-level energy management solution that provides significantly improved energy efficiency over fixed-voltage schemes in digital processing systems.
PowerWise AVS technology includes;
- A Hardware Performance Monitor (HPM) and Advanced Power Controller (APC) which are embedded onto processors, ASICs, or SoCs to gather intelligence regarding process and temperature profiles
- An AVS companion Energy Management Unit (EMU) which applies optimized voltage levels to the processors, ASICs, or SoCs
- An open standard serial interface, PowerWise Interface (PWI) or MIPISM Alliance standard (SPMI), which allows the APC to communicate with the EMU
AVS technology minimizes energy consumption by optimizing logic supply voltages adaptively over process and temperature variations. PowerWise AVS technology is process and architecture independent. Texas Instrument has the tools and infrastructure in place to fully support the implementation of PowerWise AVS in ASICs, SoCs and processors, thereby minimizing system development and implementation cycles.
A: TI's PowerWise Adaptive Voltage Scaling technology can be used to reduce energy consumption in any processing system implemented with synchronous logic like a processor, ASIC or SoC. PowerWise AVS Technology is particularly beneficial for power-constrained applications including portable equipment, USB powered peripheral devices, consumer electronics with Energy Star or similar energy efficiency classification, and bandwidth- and computing-intensive systems such as data centers and cellular base stations.
A: Dynamic voltage scaling schemes rely on pre-characterized frequency-to- voltage pair look-up tables that the processor uses to optimize dynamic power. Using DVS, when the processor wants to scale frequency, it will look up the corresponding voltage and command the power supply to transition to the desired voltage. Because DVS does not compensate for process and temperature variations, these voltages need to be high enough to maintain functionality over all power supply, process and temperature variations. As a result, DVS does not provide any energy savings in a fixed frequency system, and while DVS yields some energy savings over fixed voltage schemes at variable frequencies, it cannot match the energy savings of adaptive voltage scaling or "closed loop" scheme.
Adaptive voltage scaling uses real-time feedback on process and temperature variations to request the appropriate voltage from the power supply. This voltage is updated continuously in closed loop and can is adjusted to compensate the monitored variations in process, temperature and power supply. This reduces the actual operating voltage margin and the overall energy consumed.
A: The Powerwise Interface (PWI) is a two-wire serial, open-standard interface which provides an enhanced system power management interconnect between processors (ASICs, SoCs etc.) and energy management ICs or EMUs. The interface is specifically defined to provide high-speed real-time master-to-slave communication. It allows for the control of a voltage regulation system and other peripheral devices. It enables system designers to dynamically adjust the voltage supply on digital processors.
The PWI specification defines the required functionality in the PWI-slave; as well as the operating states, the physical interface, the register set, the command set and the data communication protocol for messaging between the PWI-master(s) and the PWI-slave(s).
PWI 1.0 is a point-to-point interface while PWI 2.0 is a multi-drop bus interface for 2 masters and up to 16 slave devices. The PWI 2.0 specification maintains the low-power, low-latency, high-bandwidth capabilities of the PWI 1.0 specification, while providing flexibility through an increased slave register address space and an expanded command set.
A: The PowerWise AVS EMU can be used without the Powerwise Interface and the APC IP. Using an AVS enabled EMU in a system where the processor does not contain a hardware based PWI master is straight forward and can be done using a GPIO port and the PWI protocol software driver. Application Note (AN1460), describes how to emulate a PWI master using general purpose input/output pins (GPIOs) – and the PWI master software driver. This can be done with a variety of processors, ASICs, and SoCs.
PowerWise AVS EMU with the SPMI or PWI interface may also be used if the processor or SoC only contains the PWI or SPMI interface master but no AVS controller. In both GPIO emulated or hardware-interfaced cases the benefits of adaptive voltage scaling will not be obtained without the use of APC.
A: You can expect to see energy savings of up to 20-50% with Powerwise AVS technology. However, actual energy savings from implementing Powerwise AVS will depend on process geometry, design implementation, and the range and profile of operating frequencies the system uses.
A: Powerwise AVS technology is compatible with all processors, ASICs and SoCs implemented with synchronous standard cell design methodology. Texas Instrument is currently licensing AVS technology to partners worldwide including Samsung Semiconductor and Teranetics. For more information on Samsung or Teranetics's AVS enabled processors, please contact Samsung Semiconductor and Teranetics directly.
A: The first generation of PowerWise AVS technology (APC1, PWI 1.0) enables a single master to control a single AVS voltage scaling domain. The second generation of Powerwise AVS technology (APC2, PWI 2.0) allows up to 2 masters to control up to 8 AVS scaling domains (4 AVS domains per master) over the PWI 2.0 interface, and provides support for multiple clock domains and overall more sophisticated SoC architectures. The third generation PowerWise technology further improves SoC power management by supporting customizable power-up levels, turbo and overdrive modes as well as adding support for the MIPI Alliance SPMI standard for peripheral device control.
A: The Advanced Power Controller supports AMBA™ APB-host interface to the host processor, a clock management interface compatible with generic frequency management and PWI and SPMI bus standards for EMU and peripheral device connectivity.
AMBA APB is a common standard for peripheral IP connectivity using the ARM AMBA circuit fabric.
PowerWise Interface (PWI) is an open standard serial interface that is freely available from pwistandard.com
SPMI is the new Mobile Industry Processor Interface (MIPI) Alliance Specification for System Power Management Interface. SPMI is a two-wire, multi-drop bus optimized for power management and control traffic occurring between the application processor, peripheral devices and other processors. The standard enhances system interoperability and enables faster mobile platform deployment. For more information on the MIPI SPMI, visit www.mipi.org.
A: PWI1.0 is not backwards compatible with PWI 2.0 or SPMI. There is limited backwards compatibility with PWI 2.0 and SPMI.
A: Powerwise AVS runs independently of other processor functions and does not affect processor performance. AVS optimizes the power delivery to the overall system, thereby reducing power consumed at the system-level.
A: LP555x family of EMUs is currently available for purchase. Contact Texas Instrument for more information on our EMU products or to inquire about the development of custom EMUs for your application.
A: APC IP Packages are available for licensing. Contact Texas Instrument for more information.
A: You can purchase AVS compatible regulators or EMUs through Texas Instrument and several electronic component distributors.