SBASA74A January 2023 – April 2024 ADS9218
ADVMIX
Register write access is enabled by setting SPI_RD_EN = 0b. The 16-bit configuration registers are grouped in three register banks and are addressable with an 8-bit register address. Register bank 1 and register bank 2 are selected for read or write operation by configuring the PAGE_SEL0 and PAGE_SEL1 bits, respectively. Registers in bank 0 are always accessible, irrespective of the PAGE_SELx bits. The register addresses in bank 0 are unique and are not used in register banks 1 and 2.
As shown in Figure 6-10, steps to write to a register are: