SLUSE97 November   2023 BQ76905

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Supply Current
    6. 6.6  Digital I/O
    7. 6.7  REGOUT LDO
    8. 6.8  Voltage References
    9. 6.9  Coulomb Counter
    10. 6.10 Coulomb Counter Digital Filter
    11. 6.11 Current Wake Detector
    12. 6.12 Analog-to-Digital Converter
    13. 6.13 Cell Balancing
    14. 6.14 Internal Temperature Sensor
    15. 6.15 Thermistor Measurement
    16. 6.16 Hardware Overtemperature Detector
    17. 6.17 Internal Oscillator
    18. 6.18 Charge and Discharge FET Drivers
    19. 6.19 Comparator-Based Protection Subsystem
    20. 6.20 Timing Requirements—I2C Interface, 100-kHz Mode
    21. 6.21 Timing Requirements—I2C Interface, 400-kHz Mode
    22. 6.22 Timing Diagram
    23. 6.23 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Configuration
      1. 7.3.1 Commands and Subcommands
      2. 7.3.2 Configuration Using OTP or Registers
      3. 7.3.3 Device Security
    4. 7.4 Device Hardware Features
      1. 7.4.1  Voltage ADC
      2. 7.4.2  Coulomb Counter and Digital Filters
      3. 7.4.3  Protection FET Drivers
      4. 7.4.4  Voltage References
      5. 7.4.5  Multiplexer
      6. 7.4.6  LDOs
      7. 7.4.7  Standalone Versus Host Interface
      8. 7.4.8  ALERT Pin Operation
      9. 7.4.9  Low Frequency Oscillator
      10. 7.4.10 I2C Serial Communications Interface
    5. 7.5 Measurement Subsystem
      1. 7.5.1 Voltage Measurement
        1. 7.5.1.1 Voltage ADC Scheduling
        2. 7.5.1.2 Unused VC Pins
        3. 7.5.1.3 General Purpose ADCIN Functionality
      2. 7.5.2 Current Measurement and Charge Integration
      3. 7.5.3 Internal Temperature Measurement
      4. 7.5.4 Thermistor Temperature Measurement
      5. 7.5.5 Factory Trim and Calibration
    6. 7.6 Protection Subsystem
      1. 7.6.1 Protections Overview
      2. 7.6.2 Primary Protections
      3. 7.6.3 CHG Detector
      4. 7.6.4 Cell Open-Wire Protection
      5. 7.6.5 Diagnostic Checks
    7. 7.7 Cell Balancing
    8. 7.8 Device Operational Modes
      1. 7.8.1 Overview of Operational Modes
      2. 7.8.2 NORMAL Mode
      3. 7.8.3 SLEEP Mode
      4. 7.8.4 DEEPSLEEP Mode
      5. 7.8.5 SHUTDOWN Mode
      6. 7.8.6 CONFIG_UPDATE Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Performance Plot
      4. 8.2.4 Random Cell Connection Support
      5. 8.2.5 Startup Timing
      6. 8.2.6 FET Driver Turn-Off
      7. 8.2.7 Usage of Unused Pins
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3 Recommended Operating Conditions

Typical values stated where TA = 25°C and VBAT = 18.5 V, min/max values stated where TA = –40°C to 110°C and VBAT = 3 V to 27.5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VBAT Supply voltage Voltage on BAT pin (normal operation) 3 27.5 V
VBAT(UVLO) Under voltage lockout level Falling voltage on BAT causing device reset 2.5 V
VWAKEONTS Wake on TS voltage Voltage on BAT pin in valid range 0.65 1.2 V
VWAKEONVC0 Wake on VC0 voltage Voltage on BAT pin in valid range 0.65 1.2 V
VIN Input voltage range ALERT, SCL, SDA 0 5.5 V
VIN Input voltage range (with ADC measurements) TS –0.2 1.8 V
VIN Input voltage range SRP, SRN, SRP-SRN (while measuring current) –0.2 0.2 V
VIN Input voltage range SRP, SRN (without measuring current) –0.2 1.8 V
VIN Input voltage range(3) VVC0 –0.2 3.0 V
VIN Input voltage range VVC1 maximum of VVC0 – 0.2 or VSS – 0.2 VVC0 + 5.5 V
VIN Input voltage range VVC2 maximum of VVC1 – 0.2 or VSS – 0.2 minimum of VVC1 + 5.5 or VSS + 27.5 V
VIN Input voltage range VVC3B maximum of VVC2 – 0.2 or VSS – 0.2 minimum of VVC2 + 5.5 or VSS + 27.5 V
VIN Input voltage range VVC3A maximum of VVC3B – 0.2 or VSS – 0.2 minimum of VVC3B + 0.1 or VSS + 27.5 V
VIN Input voltage range VVC4B maximum of VVC3A – 0.2 or VSS + 2.0 minimum of VVC3A + 5.5 or VSS + 27.5 V
VIN Input voltage range VVC4A maximum of VVC4B – 0.2 or VSS + 2.0 minimum of VVC4B + 0.1 or VSS + 27.5 V
VIN Input voltage range VVC5 maximum of VVC4A – 0.2 or VSS + 2.0 minimum of VVC4A + 5.5 or VSS + 27.5 V
VO Output voltage range CHG –25 27.5 V
VO Output voltage range DSG –0.2 14 V
ICB Cell balancing current (internal, per cell)(3) 0 50 mA
RC External cell input resistance(2)(3) 10 1000 Ω
CC External cell input capacitance(2)(3) 0.1 10 µF
Rf External supply filter resistance (BAT pin)(3) 50 1000 Ω
Cf External supply filter capacitance (BAT pin)(3) 1 40 µF
Rfilt Sense resistor filter resistance(3) 100 200 Ω
CREGSRC REGSRC capacitance(3) 1 µF
RTS External thermistor nominal resistance at 25°C 10 kΩ
TOPR Junction temperature during operation(1) –40 110 °C
(1) Power dissipated within device should be limited to ensure junction temperature remains within specification during operation.
(3) External cell input resistance times external input capacitance should be limited to 200 µs or below. 
(3) Specified by design