Valid SYSREF frequencies depend on the following parameters:
Maximum SYSREF frequency = (Sample clock frequency/N),
where N =LCM(CLKJESD_DIV,4 x K x F). N is the Least common multiple of 4 x K x F and CLKJESD_DIV.
All valid SYSREF frequencies are integer divisors of the maximum SYSREF frequency.
Given sampling clock frequency = 4.9152 GSPS, interpolation =2, DAC Mode=L-M-F-S=4-1-1-2 and K=20:
CLKJESD_DIV = 8 (CLKJESD_DIV)
Maximum SYSREF Frequency = 4915.2 MHz/80 = 61.44 MHz
Valid SYSREF Frequencies = 61.44 MHz/n, where n is any positive integer.